Analog Devices AD9854 User Manual

FEATURES

300 MHz internal clock rate
FSK, BPSK, PSK, chirp, AM operation
Dual integrated 12-bit digital-to-analog converters (DACs)
Ultrahigh speed comparator, 3 ps rms jitter
Excellent dynamic performance
80 dB SFDR at 100 MHz (±1 MHz) A
4× to 20× programmable reference clock multiplier
Dual 48-bit programmable frequency registers
Dual 14-bit programmable phase offset registers
12-bit programmable amplitude modulation and
on/off output shaped keying function
Single-pin FSK and BPSK data interfaces
PSK capability via input/output interface
Linear or nonlinear FM chirp functions with single-pin
frequency hold function
Frequency-ramped FSK
<25 ps rms total jitter in clock generator mode
REF
REFERENCE
CLK
CLOCK IN
BUFFER
DIFF/SINGLE
SELECT
SYSTEM
CLOCK
3
FSK/BPSK/HOLD
DATA IN
2
DELTA
FREQUENCY
WORD
MODE SELECT
SYSTEM
CLOCK
BIDIRECTIONAL
INT
INTERNAL/EXTERNAL
I/O UPDATE CLOCK
EXT
Rev. E
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
OUT

FUNCTIONAL BLOCK DIAGRAM

SYSTEM CLOCK
4× TO 20×
REF CLK
MULTIPLIER
48 48
MUX
48
MUX
MUX
DELTA
FREQUENCY
RATE TIMER
48 48 48
SYSTEM
CLOCK
FREQUENCY FREQUENCY
TUNING TUNING
WORD 1 WORD 2
PROGRAMMING REGISTERS
SYSTEM
CK
÷2
Q CLOCK
D
INTERNAL
PROGRAMMABLE
UPDATE CLOCK
CMOS 300 MSPS Quadrature
Automatic bidirectional frequency sweeping
Sin(x)/x correction
Simplified control interfaces
10 MHz serial 2- or 3-wire SPI compatible
100 MHz parallel 8-bit programming
3.3 V single supply
Multiple power-down functions
Single-ended or differential input reference clock
Small, 80-lead LQFP or TQFP with exposed pad

APPLICATIONS

Agile, quadrature LO frequency synthesis
Programmable clock generators
FM chirp source for radar and scanning systems
Test and measurement equipment
Commercial and amateur RF exciters
INV
DDS CORE
12
SINC
FILTER
I
17 17
INV
12
SINC
14 FILTER
Q
MUX
PROGRAMMABLE
SYSTEM
AMPLITUDE AND
CLOCK
14
14
FIRST 14-BIT SECOND 14-BIT I AND Q 12-BIT
PHASE/OFFSET PHASE/OFFSET AM MODULATION
WORD WORD
AD9854
I/O PORT BUFFERS
READ WRITE SERIAL/ 6-BIT ADDRESS
PARALLEL
SELECT PROGRAMMING
Figure 1.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
Complete DDS
DIGITAL MULTIPLIERS
12
12-BIT
I
DAC
SYSTEM
CLOCK
12-BIT
12
Q DAC OR
CONTROL
DAC
12
12
RATE CONTROL
COMPARATOR
12 12
12-BIT DC
CONTROL
BUS
8-BIT
OR SERIAL PARALLEL
LOAD
LINES
©2002–2007 Analog Devices, Inc. All rights reserved.
AD9854
ANALOG
OUT
DAC R
SET
ANALOG
OUT
ANALOG
IN
CLOCK
OUT
OSK
GND
+V
S
MASTER
RESET
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