AXEL ULite Hardware Manual
7.2
Reset scheme and control signals
The following picture shows the simplified block diagram of reset scheme
and voltage monitoring.
Fig. 6: Simplified block diagram of reset circuitry and voltage
The available reset signals are described in detail in the following
sections.
7.2.1
CPU_PORn
The following devices can assert this active-low signal:
● PMIC
● voltage monitor: this device monitors critical power voltages and
Since SPI NOR flash can be used as boot device, CPU_PORn is
connected to this device too. This guarantees it is in a known state when
triggers a reset pulse in case any of these exhibits a brownout
condition.
v.1.0.2
monitoring
August, 2019
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