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AXEL ULite Hardware Manual
6.1.5
ECSPI1
AXEL ULite on-board bootable SPI Flash is interfaced with the i.MX6UL
through the eCSPI1 port on chip select 0. For further details, please refer
to Section 3.3.
The following table describes the interface signals:
Pin Name
ECSPI1_SCLK
ECSPI1_CS0
ECSPI1_MOSI
ECSPI1_MISO
6.1.6
NAND
AXEL ULite on-board bootable NAND Flash is interfaced with the
i.MX6UL through the NAND controller port on chip select 0. For further
details, please refer to Section 3.4.
The following table describes the interface signals:
Pin Name
NAND_READY#
NAND_CLE
NAND_ALE
NAND_RE#
NAND_WE#
NAND_WP
NAND_CS0#
NAND_CS1#
NAND_DQS
NAND_DATA00
NAND_DATA01
NAND_DATA02
NAND_DATA03
v.1.0.2
Pin
Internal Connections
J2.133
CPU.CSI_DATA04
J2.135
CPU.CSI_DATA05
J2.137
CPU.CSI_DATA06
J2.139
CPU.CSI_DATA07
Tab. 19: ECSPI1 interface signals
Pin
Internal Connections
J2.84
CPU.NAND_READY
J2.86
CPU.NAND_CLE
J2.88
CPU.NAND_ALE
J2.90
CPU.NAND_RE#
J2.92
CPU.NAND_WE#
J2.94
CPU.NAND_WP
J2.96
CPU.NAND_CE0
J2.98
CPU.NAND_CE1
J2.102
CPU.AND_DQS
J2.104
CPU.NAND_DATA00
J2.106
CPU.NAND_DATA01
J2.108
CPU.NAND_DATA02
J2.110
CPU.NAND_DATA03
August, 2019
Ball/pin #
D4
D3
D2
D1
Ball/pin #
A3
A4
B4
D8
C8
D5
C5
B5
E6
D7
B7
A7
D6
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