Linear Technology 1635A Schematic Diagrams

5
VAUX1 VAUX1
E1 E1
VAUX1 VAUX1
J1 J1
3V - 18V @ 2A 3V - 18V @ 2A
VAUX1
GND1 GND1
J2 J2
D
GND1 GND1
E2 E2
VIN1
VIN1 VIN1
E3 E3
VIN1 VIN1
J3 J3
2.5V - 18V @ 2A 2.5V - 18V @ 2A
CIN1 CIN1
GND1 GND1
0.1uF 0.1uF
J4 J4
50V 50V
0805 0805
GND1 GND1
E4 E4
R5 R5
0 0
CTL1 CTL1
E13 E13
C
CTL1
VAUX2 VAUX2
E5 E5
VAUX2
VAUX2 VAUX2
J5 J5
5V - 36V @ 8A 5V - 36V @ 8A
VAUX2
GND2 GND2
J6 J6
GND2 GND2
E6 E6
B
VIN2
VIN2 VIN2
E7 E7
VIN2 VIN2
J7 J7
5V - 36V @ 8A 5V - 36V @ 8A
CIN2 CIN2
0.1uF 0.1uF
50V 50V
0805 0805
GND2 GND2
J8 J8
GND2 GND2 R6 R6
E8 E8
0 0
A
CTL2 CTL2
E18 E18
CTL2
5
4
DUAL PKG
U1 U1 LTC4412HVIS6 LTC4412HVIS6
1 6 VOUT1
VIN SENSE
2 5 GATE1
GND GATE
CTL1 3 4 STAT1
CTL STAT
U2 U2 LTC4414EMS8 LTC4414EMS8
VIN2 7 6 VOUT2
VIN SENSE
3 8 GATE2
GND GATE
CTL2 2 1 STAT2
CTL STAT
4 5
NC NC
NOTE: UNLESS OTHERWISE SPECIFIED
1. ALL RESISTORS ARE IN OHMS, 0603.
ALL CAPACITORS ARE IN MICROFARADS, 0603.
4
3
Q1A Q1A
S1A
SiA921EDJ SiA921EDJ
7
*
JMP1 JMP1
6 1 S1A
R1 R1
680K 680K
Q1B Q1B
SiA921EDJ SiA921EDJ
8
3 4 S1B
JMP2 JMP2
S1B
GATE1
STAT1
R2 R2 560K 560K
(OPT) (OPT)
ISOLATED
S2A
Q2 Si7463DP Q2 Si7463DP
8 *
JMP3 JMP3
7 3
S2A
6 2
5 1
R3 R3
100K 100K
S2B
*
Q3 Si7463DP Q3 Si7463DP
8
JMP4 JMP4
7 3 S2B
6 2
5 1
R4 R4
560K 560K
(OPT) (OPT)
CUSTOMER NOTICE CUSTOMER NOTICE CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED APPLICATION. COMPONENT SUBSTITUTION AND PRINTED APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR PERFORMANCE OR RELIABILITY. CONTACT LINEAR PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
3
2
ECO ECO ECO REV REV REV
2 2 2
VOUT1
VOUT1 VOUT1
E9 E9
*
VOUT1 VOUT1
J9 J9
COUT1 COUT1 2.5V - 18V @ 2A 2.5V - 18V @ 2A
0.1uF 0.1uF
50V 50V
0805 0805
GND1 GND1
J10 J10
GND1 GND1
E10 E10
STAT1 STAT1
E14 E14
VCC1
VCC1 VCC1
E15 E15
NOTE FOR THIS PAGE:
VOUT2
TOP LAYER CIRCUITS FOR U1 AND U2 ARE ELECTRICALLY
VOUT2 VOUT2 ISOLATED FROM EACH OTHER. THEY DO NOT SHARE GND,
E11 E11
VIN, VAUX, OR VOUT. JUMPERS CAN BE USED TO
PARALLEL THE TWO CIRCUITS AS NECESSARY.
VOUT2 VOUT2
J11 J11
5V - 36V @ 8A 5V - 36V @ 8A
*CLARIFICATION: SHOWN HERE AS CONNECTED FOR TOP
COUT2 COUT2
LAYER CIRCUIT, BUT STUFFED ON BOTTOM LAYER.
0.1uF 0.1uF
50V 50V
GND2 GND2
# IF THE CTL PIN OF THE LTC4412 AND/OR LTC4414 IS NOT
0805 0805
J12 J12
USED, IT IS RECOMENDED THAT CTL BE CONNECTED TO
GND IN THE FINAL DESIGN.
GND2 GND2
E12 E12
GATE2
STAT2
STAT2 STAT2
E16 E16
VCC2
VCC2 VCC2
E17 E17
APPROVALS APPROVALS APPROVALS
TECHNOLOGY TECHNOLOGY TECHNOLOGY
PCB DES. PCB DES. PCB DES.
AK AK AK
TITLE: TITLE: TITLE: SCHEMATIC SCHEMATIC SCHEMATIC
APP ENG. APP ENG. APP ENG. JOSH Y. JOSH Y. JOSH Y.
DUAL LOW LOSS 36V POWERPATH CONTROLLERS DUAL LOW LOSS 36V POWERPATH CONTROLLERS DUAL LOW LOSS 36V POWERPATH CONTROLLERS
SIZE SIZE SIZE IC NO. IC NO. IC NO.
N/A N/A N/A
SCALE = NONE SCALE = NONE SCALE = NONE
DATE: DATE: DATE: Monday, December 17, 2012 Monday, December 17, 2012 Monday, December 17, 2012
2
1

REVISION HISTORY

REVISION HISTORY REVISION HISTORY
DESCRIPTION DESCRIPTION DESCRIPTION APPROVED APPROVED APPROVED DATE DATE DATE
2ND PROTOTYPE 2ND PROTOTYPE 2ND PROTOTYPE
JOSH Y. JOSH Y. JOSH Y. 11-9-10 11-9-10 11-9-10
1630 McCarthy Blvd. 1630 McCarthy Blvd. 1630 McCarthy Blvd.
Milpitas, CA 95035 Milpitas, CA 95035 Milpitas, CA 95035
www.linear.com www.linear.com www.linear.com
Phone: (408)432-1900 Phone: (408)432-1900 Phone: (408)432-1900
Fax: (408)434-0507 Fax: (408)434-0507 Fax: (408)434-0507
LTC Confidential-For Customer Use Only LTC Confidential-For Customer Use Only LTC Confidential-For Customer Use Only
REV. REV. REV.
LTC4412HVIS6 & LTC4414EMS8 LTC4412HVIS6 & LTC4414EMS8 LTC4412HVIS6 & LTC4414EMS8
2 2 2
DEMO CIRCUIT 1635A DEMO CIRCUIT 1635A DEMO CIRCUIT 1635A
SHEET SHEET SHEET 1 1 1 OF OF OF 3 3 3
1
D
C
B
A