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BQ76952
SLUSE13A – JANUARY 2020 – REVISED MAY 2021
bit which causes the conversion speed for both voltages and CC2 Current to be doubled, with a reduction in
measurement resolution.
The device will generally be in NORMAL mode whenever any active charging or discharging is underway. When
the CC1 Current measurement falls below a programmable current threshold, the system is considered in relax
mode, and the BQ76952 device can autonomously transition into SLEEP mode, depending on the configuration.
13.3 SLEEP Mode
SLEEP mode is a reduced functionality state that can be optionally used to reduce power dissipation when
there is little or no system load current or charging in progress, but still provides voltage at the battery pack
terminals to keep the system alive. At initial power up, a configuration bit determines whether the device can
enter SLEEP mode. After initialization, SLEEP mode can be allowed or disallowed using subcommands. Status
bits are provided to indicate whether the device is presently allowed to enter SLEEP mode or not, and whether it
is presently in SLEEP mode or not.
When the magnitude of the CC1 Current measurement falls below a programmable current threshold, the
system is considered in relax mode, and the BQ76952 device will autonomously transition into SLEEP mode,
if settings permit. During SLEEP mode, comparator-based protections operate the same as during NORMAL
mode. ADC-based current, voltage, and temperature measurements are taken at programmable intervals. All
temperature protections use the ADC measurements taken at these intervals, so they will update at a reduced
rate during SLEEP mode.
The BQ76952 device will exit SLEEP mode if a protection fault occurs, or current begins flowing, or a charger
is attached, or if forced by subcommand, or if the RST_SHUT pin is asserted for < 1-sec. When exiting based
on current flow, the device will quickly enable the FETs (if the CHG FET was off, or the DSG FET was in source
follower mode), but the standard measurement loop is not restarted until the next 1-sec boundary occurs within
the device timing. Therefore, new data may not be available for up to ≈1-sec after the device exits SLEEP mode.
The coulomb counter ADC operates in a reduced power and speed mode to monitor current during SLEEP
mode. The current is measured every 12 ms and, if it exceeds a programmable threshold in magnitude, the
device quickly transitions back to NORMAL mode. In addition to this check, if the CC1 Current measurement
taken at each programmed interval exceeds this threshold, the device will exit SLEEP mode.
The device monitors the PACK pin voltage and the top-of-stack voltage at each programmed measurement
interval. If the PACK pin voltage is higher than the top-of-stack voltage by more than a programmable delta and
the top-of-stack voltage is less than a programmed threshold, the device will exit SLEEP mode. The BQ76952
device also includes a hysteresis on the SLEEP mode entrance, in order to avoid the device quickly entering and
exiting SLEEP mode based on a dynamic load. After transitioning to NORMAL mode, the device will not enter
SLEEP mode again for a number of seconds given by the hysteresis setting.
During SLEEP mode, the DSG FET can be driven either using the charge pump or in source-follower mode,
as described in
Section
configuration setting.
13.4 DEEPSLEEP Mode
The BQ76952 device integrates a DEEPSLEEP mode, which is a low power mode that allows the REG1 and
REG2 LDOs to remain powered, but disables other subsystems. In this mode, the protection FETs are all
disabled, so no voltage is provided at the battery pack terminals. All protections are disabled, and all voltage,
current, and temperature measurements are disabled.
DEEPSLEEP mode can be entered by sending a subcommand over the serial communications interface. The
device will exit DEEPSLEEP mode and return to NORMAL mode if directed by a subcommand, or if the
RST_SHUT pin is asserted for < 1 second, or if a charger is attached (which is detected by the voltage on
the LD pin rising from below V
V
, the device transitions to SHUTDOWN mode.
PORA_HYS
When the device exits DEEPSLEEP mode, it first completes a full measurement loop and evaluates conditions
relative to enabled protections, to ensure that conditions are acceptable to proceed to NORMAL mode. This may
take ≈250 ms plus the time for the measurement loop to complete.
52
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11.4. The CHG FET can be disabled or driven using the charge pump, based on the
to exceed it). In addition, if the BAT pin voltage falls below V
WAKEONLD
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BQ76952
www.ti.com
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PORA
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