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SMBus Connector
The SMBus (System Management Bus) connector is used to connect SMBus devices. It is a
multiple device bus that allows multiple chips to connect to the same bus and enable each one
to act as a master by initiating data transfer.
SMBus
26
LPC Connector
The Low Pin Count Interface was defined by Intel
sition towards legacy free systems. It allows the integration of low-bandwidth legacy I/O com-
ponents within the system, which are typically provided by a Super I/O controller. Furthermore,
it can be used to interface firmware hubs, Trusted Platform Module (TPM) devices and embed-
ded controller solutions. Data transfer on the LPC bus is implemented over a 4 bit serialized
data interface, which uses a 33MHz LPC bus clock. For more information about LPC bus refer
to the Intel
Low Pin Count Interface Specification Revision 1.1'. The table below indicates the
®
pin fuctions of the LPC connector.
Pins
Pin Assignment
1
L_CLK
3
L_RST#
L_FRAME#
5
7
L_AD3
L_AD2
9
INT_SERIRQ
11
5VSB
13
14 13
LPC
2 1
Corporation to facilitate the industry's tran-
®
Pins
Pin Assignment
2
L_AD1
4
L_AD0
3V3
6
8
GND
Key
10
GND
12
5V
14
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