Sony CA-702 Maintenance Manual page 85

Camera adaptor
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CXD2310AR-T4 (SONY)
C-MOS 10-BIT 20 MSPS VIDEO A/D CONVERTER
—TOP VIEW—
TSTR
37
COURSE
CONPARATE
& ENCODE
AT
38
S/H
VIN
39
AMP.
+
_
+
DAC
40
NC
CAL
41
TS
42
43
AGND
AMP.
(x 8)
44
AGND
45
DV
DD
(+3 V)
FINE
46
NC
COMPARATE
& ENCODE
47
NC
48
DGND
FINE LATCH
29
12
VRT
D9
30
11
VRT
D8
39
10
VIN
D7
34
9
VRB
D6
35
8
VRB
D5
41
5
CAL
D4
17
4
SEL
D3
15
3
RESET
D2
24
2
CE
D1
23
1
OE
D0
22
CLK
14
13
TIN
TO
37
38
TSTR
AT
42
TS
INPUT
; CALIBRATION PULSE INPUT
CAL
; CHIP ENABLE
CE
; CLOCK
CLK
; OUTPUT (D0 - D8) INVERSION
LINV
; OUTPUT (D9) INVERSION
MINV
; DIGITAL DATA OUTPUT ENABLE
OE
; CALIBRATION CIRCUIT RESET
RESET
; OUTPUT DATA (D5 - D9) SELECT FOR CALIBRATION (4-CLOCK)
SEL
HIGH ; THROUGH OUTPUT, OW ; DATA FIXED AS WITH D0 - D4
; TEST SIGNAL INPUT
TIN
; TEST MODE
TMOD
; TEST SIGNAL INPUT
TS
; TEST SIGNAL INPUT
TSTR
; REFERENCE BOTTOM VOLTAGE
VRB
; REFERENCE TOP VOLTAGE
VRT
OUTPUT
; TEST SIGNAL OUTPUT
AT
; DIGIRAL DATA OUTPUT
D0 - D9
; TEST PIN
TO
CA-702
CA-702P
http://getMANUAL.com
24
CE
23
OE
TIMING
22
CLK
GEN.
21
MINV
20
LINV
19
TMOD
AV
18
DD
(+5 V)
17
SEL
DGND
16
15
RESET
14
TIN
13
TO
COURSE CORRECTION
& LATCH
CXD3122R (SONY)
C-MOS DIGITAL LINE MEMORY
—TOP VIEW—
37
24
NC
38
23
39
22
40
21
NC
41
20
42
V
DD ( +3.0 to +5.5 V )
19
43
V
DD ( +3.0 to +5.5 V )
18
44
NC
17
45
NC
16
46
NC
15
47
NC
14
48
13
(V
= +3.3 to +5.5 V)
DD
PIN
PIN
I/O
SIGNAL
I/O
SIGNAL
NO.
NO.
OEN
1
I
DIN0
25
I
2
I
DIN1
26
O
DOT9
3
I
DIN2
27
O
DOT8
4
I
DIN3
28
O
DOT7
5
I
DIN4
29
O
DOT6
6
GND
30
GND
7
I
DIN5
31
O
DOT5
8
I
DIN6
32
O
DOT4
9
I
DIN7
33
O
DOT3
10
I
DIN8
34
O
DOT2
11
I
DIN9
35
O
DOT1
12
I
COMP
36
O
DOT0
13
I
PSW7
37
I
STB
14
I
PSW6
38
NC
15
I
PSW5
39
I
AEN
16
I
PSW4
40
I
NTSC/PAL
17
I
PSW3
41
NC
18
I
PSW2
42
I
CLK
19
V
43
V
DD
DD
20
I
PSW1
44
NC
21
I
PSW0
45
NC
22
I
PSB2
46
NC
23
I
PSB1
47
NC
24
I
PSB0
48
I
TEST
INPUT
AEN
: AMOUNT OF DELAY SELECT
CLK
: CLOCK
COM
: COMPATIBILITY SELECT
DIN0 - DIN9
: DATA
NTSC/PAL
: AMOUNT OF DELAY FOR NTSC/PAL/SECAM SELECT
OEN
: OUTPUT ENABLE
PSB0 - PSB2
: NUMBER OF SMALL DELAY SETTING
PSW0 - PSW7
: NUMBER OF DELAY SETTING
STB
: STANDBY
TEST
: TEST
OUTPUT
DOT0 - DOT9
: DATA
25
OEN
22 - 24
PSB0 - PSB2
1 - 5,
7 - 11
1-LINE
DIN0 - DIN9
BUFFER
MEMORY
(1138 x 10-BIT)
ADDRESS
COUNTER
13 - 18, 20, 21
ADDRESS
PSW0 - PSW7
MULTIPLEXER
40
NTSC/PAL
39
AEN
48
TEST
TEST
12
COMP
37
STB
42
CLK
1
36
DIN0
DOT0
2
35
DIN1
DOT1
3
34
DIN2
DOT2
4
33
DIN3
DOT3
32
5
DOT4
DIN4
7
31
DIN5
DOT5
8
29
DIN6
DOT6
9
28
DIN7
DOT7
10
27
DIN8
DOT8
11
26
DIN9
DOT9
12
COMP
21
PSW0
20
PSW1
18
PSW2
17
PSW3
16
PSW4
15
PSW5
14
PSW6
13
PSW7
24
PSB0
23
PSB1
22
PSB2
37
STB
39
AEN
40
NTSC/PAL
42
CLK
48
TEST
OEN
25
26 - 29,
SMALL
31 - 36
DELAY
BUFFER
DOT0 - DOT9
CONTROLLER
TIMING
CONTROLLER
4-7
IC

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