Supermicro A+ AS-4023S-TRT User Manual page 105

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Processor Family
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Processor Model
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Microcode Patch Level
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L1 Instruction Cache (Size/Method)
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L1 Data Cache (Size/Method)
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L2 Cache (Size/Method)
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L3 Cache per Scoket (Size/Method)
CPU2 Information

These sections are for informational purposes. They will display some details about the
detected CPUs on the motherboard, such as:
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CPU Version
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Number of Cores Running
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Clock speed
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Processor Family
•
Processor Model
•
Microcode Patch Level
•
L1 Instruction Cache (Size/Method)
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L1 Data Cache (Size/Method)
•
L2 Cache (Size/Method)
•
L3 Cache per Scoket (Size/Method)
NB Configuration

Determinism Control
Use this setting to configure the Determinism Slider. Options include Auto, Power and
Performance.
cTDP Control
Use this setting to configure the cTDP Control. Options include Manual and Auto.
Chapter 7: BIOS (EPYC 7002 Series)
105