Operating Specifications - Cabletron Systems MRX Installation Manual

10base-t hub
Table of Contents

Advertisement

2.4 OPERATING SPECIFICATIONS

The operating specifications for the Cabletron Systems' HUB are
described in this section. Cabletron Systems reserves the right to
change these specifications at any time without notice.
GENERAL
Packet Buffer Memory (RAM): 64 KB
Internal Processor:
Ethernet Controller:
Static RAM:
EPROM:
Delay Times:
Start of Packet:
JAM:
Preamble:
Input:
Output:
JAM Output:
REQUIREMENTS/SPECIFICATIONS
MRXI/MRXI-2 Only
MRX/MRX-2 and MRXI/MRXI-2
In
Twisted Pair
Twisted Pair
SPIM
SPIM
Twisted Pair
Twisted Pair
SPIM
Minimum of 20 bits required.
64 bits min. (last 2 bits are 1, 1).
Collisions are propagated through the
network using the JAM signal of an
alternating pattern of 1's and 0's in
accordance with 802.3 specifications for
a repeater unit.
Intel 80186 operating at 10 MHz
National Semiconductor DP8390
128 KB
256 KB
Out
SPIM
Twisted Pair 1000 nsec.
SPIM
Twisted Pair 1300 nsec.
SPIM
Twisted Pair
Twisted Pair 1000 nsec.
Delay Typ.
1000 nsec.
1300 nsec.
700 nsec.
700 nsec.
Page 2-7

Advertisement

Table of Contents
loading

This manual is also suitable for:

MrxiMrxi-2Mrx-2

Table of Contents