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8.0
DUAL-SLOPE CONVERSION
At the beginning of a conversion, the voltage across C
then applied to the integrator and the voltage across C
E
At the end of a fixed period of 10000 counts, T1, the counters are reset to 00000.
The signal input is turned off and a stable reference voltage of the opposite
polarity is now applied to the input. Since the reference voltage is constant, the
slope, in volts/sec, during this second period, T2, is constant and independent of
input signal levels. The time required to discharge the capacitor back to zero volts
is then proportional to the signal voltage. The relationship between the signal
integration time, T1, and the reference integration time, T2, can be expressed by
the formula:
E
After the clock is stopped by the capacitor voltage reaching zero, a third period,
T3, allows the circuit to auto-zero the integrator and comparator for the next
reading. A low level on the HOLD input prevents the reset pulse from starting the
counters.
T1
= Esig R
C
Cint
int
int
T2 = E
T1
ref
sig
Dual-slope Conversion Diagram
Figure 8.1
13
is zero. The signal is
int
rises by the formula:
int
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