Introduction; Power Supply; Hardware Configuration - Texas Instruments PCM1808EVM User Manual

Introduction

1 Introduction
The PCM1808EVM is an evaluation module (EVM) designed to demonstrate the performance and
functionality of the PCM1808 device. The PCM1808 is a high-performance, low-cost, single-chip, stereo
analog-to-digital converter (ADC) with single-ended analog voltage input. The device is configured through
logic-level mode selection pins and does not require a digital interface such as I2C or SPI to configure
registers. As such, no software is necessary to interface with the EVM. The EVM is powered with a single
5-V supply. Access to the converter output is provided on the audio serial interface in I2S and LJ formats.
2

Power Supply

The PCM1808EVM is powered with a single 5-V power supply connected to J11. An onboard low-dropout
regulator converts the 5-V supply to the 3.3-V rail used by the ADC. The analog supply, VCC, is fixed at 5-
V and the digital supply, VDD, at 3.3 V. The power status of the EVM is indicated by LED (D1), which will
illuminate when power is applied to the board.
3

Hardware Configuration

The format of the audio data and the operating mode of the ADC are controlled by the following pins:
MD0, MD1, and FMT. These signals are referenced to VDD and can be set to high (1) or low (0). If no
shunt is installed, then an internal 50-kΩ pulldown resistor will set the pin low so that the ADC remains in
a defined state. Table 1
the possible modes and output formats, respectively. In master mode, BCK and LRCK are outputs
generated by internal divider circuitry from the SCKI input. Thus, SCKI must be a valid multiple of the
intended sample rate. MD0 and MD1 are used to select the serial audio data communication timing and
must be set prior to power on. The frequency of BCK is constant at 64 BCK/frame. In slave mode, BCK
and LRCK work as input pins. The device accepts 64-BCK/frame or 48-BCK/frame format (only for a 384
fs system clock), but not 32-BCK/frame format. Although BCK and LRCK are no longer derived from SCKI
in slave mode, a valid SCKI is still required for operation.
Designator
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
MD1
0
0
1
1
2
PCM1808 Evaluation Module
shows the header numbers and their pin functions and
Table 1. PCM1808EVM Headers and Jumpers
Audio serial interface: system clock input
Audio serial interface: bit-clock input or output
Audio serial interface: latch-enable input or output
Audio serial interface: digital data output
Table 2. PCM1808 Mode Settings
MD0
0 Slave mode (256 fs, 384 fs, 512 fs auto-detection)
1
0
1
Copyright © 2020, Texas Instruments Incorporated
Function
System clock source
FMT select
MD1 select
MD0 select
Analog audio input: right
Analog audio input: left
+5-V supply input
Interface Mode
Master mode (512 fs)
Master mode (384 fs)
Master mode (256 fs)
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Table 2 and Table 3 show
SBAU349 – June 2020
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