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This user's guide describes the characteristics, operation, and use of the Texas Instruments
TPS650380EVM-054 (PWR054-001) evaluation module (EVM). This EVM is designed to help the user
evaluate and test the operation and functionality of the TPS650380. The EVM converts a 2.5-V to 5.5-V
input voltage to 3 regulated output voltages that deliver 5 A, 2 A, and 1.8 A. The 5-A output operates 3
phases, the 2-A output operates 2 phases, and the 1.8-A output operates a single phase. The output
voltages are programmable via the I
user's guide includes setup instructions for the hardware, printed-circuit board layouts for the EVM, a
schematic diagram, a bill of materials, and test results for the EVM.
1
Introduction
.........................................................................................................................
2
Setup
3
Software Setup and Operation
4
Test Results
5
Board Layout
6
Schematic and Bill of Materials
1
TPS650380 Software Main Panel
2
Efficiency vs. Input Voltage (DCDC_A = DCDC_B = DCDC_C = 0.96 V, I
.....................................................................................................................
= 0.9 A)
3
4
5
6
7
Line Regulation (DCDC_A = DCDC_B = DCDC_C = 0.96 V, I
8
Start-up (V
IN
9
Shutdown (V
Output Capacitor Discharge Enabled)
10
Shutdown (V
Output Capacitor Discharge Enabled)
11
Output Voltage Ripple Measured Across C6 (V
disabled, I
OUTA
12
Input Voltage Ripple Measured Across C13 (V
Disabled, I
OUTA
13
Load Transient Response (V
.................................................................................................................
to 5 A step)
14
Loop Response (V
15
Thermal Performance (V
A, I
= 0.9 A)
OUTC
16
Assembly Layer
17
Top Silk Layer
...................................................................................................................
18
Top Layer
2
I
C is a trademark of NXP B.V Corporation.
VeriSign is a trademark of VeriSign, Inc.
All other trademarks are the property of their respective owners.
SLVU720A - June 2012 - Revised November 2012
Submit Documentation Feedback
2
C™ interfaces in 10-mV steps between 0.5 V and 1.77 V. This
..................................................................................................................
............................................................................................
................................................................................................................
...............................................................................................................
..........................................................................................
........................................................................................
= 3.6 V, DCDC_A = DCDC_B = DCDC_C = 0.96 V)
IN
= 3.6 V, DCDC_A = DCDC_B = DCDC_C = 0.96 V, I
= 3.6 V, DCDC_A = DCDC_B = DCDC_C = 0.96 V, I
IN
..................................................................................
= 3.6 V, DCDC_A = DCDC_B = DCDC_C = 0.96 V, I
IN
..................................................................................
......................................................................................................
= 5 A)
......................................................................................................
= 5 A)
= 3.6 V, DCDC_A = 0.96 V, DCDC_B = DCDC_C = Disabled, I
IN
= 3.6 V, DCDC_A = 0.96 V, DCDC_B = DCDC_C = Disabled, I
IN
= 3.6 V, DCDC_A = DCDC_B = DCDC_C = 0.96 V, I
IN
............................................................................................................
............................................................................................................
..............................................................................................................
Copyright © 2012, Texas Instruments Incorporated
SLVU720A - June 2012 - Revised November 2012
TPS650380EVM-054
Contents
List of Figures
..............................................................
= 3.6 V)
IN
..............................................................
= 3.6 V)
IN
..............................................................
= 3.6 V)
IN
= 3.4 A, I
OUTA
= I
OUTA
OUTA
OUTA
= 3.6 V, DCDC_A = 0.96 V, DCDC_B = DCDC_C =
IN
= 3.6 V, DCDC_A = 0.96 V, DCDC_B = DCDC_C =
IN
User's Guide
= 3.4 A, I
= 1.85 A, I
OUTA
OUTB
.......................................
= 1.85 A, I
= 0.9 A)
OUTB
OUTC
...................
= I
= 0 A)
OUTB
OUTC
= I
= I
= 0 A, Active
OUTB
OUTC
= I
= I
= 0 A, Active
OUTB
OUTC
= 3 A
OUTA
..............
= 5 A)
OUTA
= 3.4 A, I
= 1.85
OUTA
OUTB
TPS650380EVM-054
2
3
8
11
18
24
8
OUTC
11
11
12
12
13
.....
13
14
14
15
15
16
16
17
17
18
19
20
1
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Summary of Contents for Texas Instruments TPS650380EVM-054
-
Page 1: Table Of Contents
This user’s guide describes the characteristics, operation, and use of the Texas Instruments TPS650380EVM-054 (PWR054-001) evaluation module (EVM). This EVM is designed to help the user evaluate and test the operation and functionality of the TPS650380. The EVM converts a 2.5-V to 5.5-V input voltage to 3 regulated output voltages that deliver 5 A, 2 A, and 1.8 A. - Page 2 C protocol, and sends the I C signal to the TPS650380 EVM board. Software Texas Instruments provides software to assist in evaluating this EVM. This software can be downloaded from the TPS650380EVM-054 Product Page, located at: http://focus.ti.com/docs/toolsw/folders/print/TPS650380EVM-054.html. Printed-Circuit Board Assembly The board contains the TPS650380 IC and the required external components to evaluate it as a processor power supply solution.
-
Page 3: Performance Specification Summary
= 200mA 90.1% Setup This section describes the jumpers and connectors on the EVM as well as how to properly connect, set up, and use the TPS650380EVM-054 (PWR054-001). Connector and Jumper Descriptions 2.1.1 J1 – V This header is for the positive input supply voltage to the converter. Connect the input supply at this point if the input current remains below 1 A. - Page 4 This is the return connection for the DCDC_C load. The leads to the load should be twisted and kept as short as possible to minimize EMI transmission and reduce inductive voltage droop during a load transient event. TPS650380EVM-054 SLVU720A – June 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated...
- Page 5 C Monitor Point and Alternate Connection This header is provided to connect to or monitor the SYS I C signals on the TPS650380EVM-054. If the C signals are being sent via this header (and not via the USB-TO-GPIO adaptor), do not plug into the J19 or J25 headers and provide a separate V supply between J13 and J14.
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Page 6: Default Jumper Settings
Table 2. Default Jumper Settings JUMPER DEFAULT Installed across pins 1 and 2 Installed across pins 1 and 2 TPS650380EVM-054 SLVU720A – June 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... - Page 7 J3 (for currents below 1 A) or to the terminal block J16 (for currents greater than 1 A). The leads should be short and twisted. Turn on the power supply. SLVU720A – June 2012 – Revised November 2012 TPS650380EVM-054 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated...
- Page 8 This section provides descriptions of the EVM software and functionality. The supplied software is used to communicate with the TPS650380EVM-054. Click on the icon on the host PC to start the software. The host PC software first checks the firmware version of the USB-TO-GPIO adapter.
- Page 9 Load Step Circuit The TPS650380EVM-054 contains a simple circuit that produces fast load current steps at the output of the TPS650380. This evaluates the response of the TPS650380 to various load transients that might occur in the system.
- Page 10 USB-TO-GPIO adaptor but are not recommended when using the adaptor. If used, their typical value is around 2.2 kΩ. TPS650380EVM-054 SLVU720A – June 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated...
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Page 11: Efficiency Of Dcdc_A Vs. Output Current
Test Results www.ti.com Test Results This section provides typical performance waveforms for the TPS650380EVM-054. The default register settings were used unless otherwise noted. DCDC_A DCDC_B DCDC_C Input Voltage - V Figure 2. Efficiency vs. Input Voltage (DCDC_A = DCDC_B = DCDC_C = 0.96 V, I = 3.4 A, I... -
Page 12: Efficiency Of Dcdc_B Vs. Output Current
= 3.6 V) 0.96V 1.2V 1.4V 1000 Load Current - mA Figure 5. Efficiency of DCDC_C vs. Output Current (V = 3.6 V) TPS650380EVM-054 SLVU720A – June 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 13: Load Regulation
(DCDC_A = DCDC_B = DCDC_C = 0.96 V, I = 3.4 A, I = 1.85 A, I = 0.9 A) OUTA OUTB OUTC SLVU720A – June 2012 – Revised November 2012 TPS650380EVM-054 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 14: Start-Up
= 3.6 V, DCDC_A = DCDC_B = DCDC_C = 0.96 V, I = 0 A, OUTA OUTB OUTC Active Output Capacitor Discharge Enabled) TPS650380EVM-054 SLVU720A – June 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... - Page 15 Figure 11. Output Voltage Ripple Measured Across C6 = 3.6 V, DCDC_A = 0.96 V, DCDC_B = DCDC_C = disabled, I = 5 A) OUTA SLVU720A – June 2012 – Revised November 2012 TPS650380EVM-054 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated...
- Page 16 Figure 13. Load Transient Response = 3.6 V, DCDC_A = 0.96 V, DCDC_B = DCDC_C = Disabled, I = 3 A to 5 A step) OUTA TPS650380EVM-054 SLVU720A – June 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated...
- Page 17 = 3.6 V, DCDC_A = DCDC_B = DCDC_C = 0.96 V, I = 3.4 A, I = 1.85 A, I = 0.9 A) OUTA OUTB OUTC SLVU720A – June 2012 – Revised November 2012 TPS650380EVM-054 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated...
- Page 18 Figure 20 show the board layout for the TPS650380EVM-054 PCB. The nodes with high-switching frequencies and currents are kept as short as possible to minimize trace inductance. Careful attention has been given to the routing of high-frequency current loops and a single-point grounding scheme is used. Also, the majority of the heatsinking for this device occurs through the top layer traces and vias pulled from the IC's solder bumps that carry high currents.
- Page 19 Board Layout www.ti.com Figure 17. Top Silk Layer SLVU720A – June 2012 – Revised November 2012 TPS650380EVM-054 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated...
- Page 20 Board Layout www.ti.com Figure 18. Top Layer TPS650380EVM-054 SLVU720A – June 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated...
- Page 21 Board Layout www.ti.com Figure 19. Layer 2 SLVU720A – June 2012 – Revised November 2012 TPS650380EVM-054 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated...
- Page 22 Board Layout www.ti.com Figure 20. Layer 3 TPS650380EVM-054 SLVU720A – June 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated...
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Page 23: Bottom Layer
Board Layout www.ti.com Figure 21. Bottom Layer SLVU720A – June 2012 – Revised November 2012 TPS650380EVM-054 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 24: Tps650380 Solution Required Components
3.25 mm x 3.25 mm TPS650380YFF The TPS650380EVM-054 is populated with TPS650380 (U1) devices that do not contain the correct top side markings on the top of the device itself. These devices are still fully tested TPS650380 devices. Table 4. TPS650380EVM-054 Evaluation Components... -
Page 25: Schematic
See user's guide for output current NOTE: EVM IS FACTORY CONFIGURED FOR LOCAL SENSING. CONSULT USER'S GUIDE FOR REMOTE SENSING OPTION. Figure 22. Schematic, Page 1 SLVU720A – June 2012 – Revised November 2012 TPS650380EVM-054 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... -
Page 26: Schematic
Parts without values are not installed Figure 23. Schematic, Page 2 Related Documentation From Texas Instruments miniPMU with 3 DC/DC Converters for Application Processors data sheet (SLVSBL5) TPS650380EVM-054 SLVU720A – June 2012 – Revised November 2012 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated... - Page 27 Any exceptions to this are strictly prohibited and unauthorized by Texas Instruments unless user has obtained appropriate experimental/development licenses from local regulatory authorities, which is responsibility of user including its acceptable authorization.
- Page 28 FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
- Page 29 Also, please do not transfer this product, unless you give the same notice above to the transferee. Please note that if you could not follow the instructions above, you will be subject to penalties of Radio Law of Japan. Texas Instruments Japan Limited (address) 24-1, Nishi-Shinjuku 6 chome, Shinjuku-ku, Tokyo, Japan http://www.tij.co.jp...
- Page 30 FDA Class III or similar classification, then you must specifically notify TI of such intent and enter into a separate Assurance and Indemnity Agreement. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2012, Texas Instruments Incorporated...
- Page 31 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.
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