Neoway N75 Series Hardware User's Manual

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Hardware User Guide
Issue 1.1 Date 2020-01-16

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Summary of Contents for Neoway N75 Series

  • Page 1 Hardware User Guide Issue 1.1 Date 2020-01-16...
  • Page 2 THIS GUIDE PROVIDES INSTRUCTIONS FOR CUSTOMERS TO DESIGN THEIR APPLICATIONS. PLEASE FOLLOW THE RULES AND PARAMETERS IN THIS GUIDE TO DESIGN AND COMMISSION. NEOWAY WILL NOT TAKE ANY RESPONSIBILITY OF BODILY HURT OR ASSET LOSS CAUSED BY IMPROPER OPERATIONS. THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE DUE TO PRODUCT VERSION UPDATE OR OTHER REASONS.
  • Page 3: Table Of Contents

    3.8 Other Interfaces ......................... 59 3.8.1 GNSS_LNA_EN ........................ 59 3.8.2 ADC ........................... 59 3.8.3 RING ..........................59 3.8.4 DTR ........................... 60 3.8.5 USB_BOOT ........................62 4 Electric Feature and Reliability ..............63 4.1 Electric Features ........................63 Copyright © Neoway Technology Co., Ltd...
  • Page 4 A.1 Approvals ........................... 78 A.2 American Notice ......................... 78 A.2.1 Modify ..........................78 A.2.2 FCC Class A Digital Device Notice ................... 78 A.2.3 FCC Class B Digital Device Notice ................... 79 Abbreviation .................... 80 Copyright © Neoway Technology Co., Ltd...
  • Page 5 Figure 3-20 Recommended level shifting circuit 3 ................27 Figure 3-21 SD connection ......................29 Figure 3-22 SDC SDR timing ......................30 Figure 3-23 SDC DDR timing ......................30 Figure 3-24 I2S connection ......................32 Figure 3-25 I2S timing ........................32 Copyright © Neoway Technology Co., Ltd...
  • Page 6 Figure 3-52 Reference design of active GNSS antenna ..............53 Figure 3-53 Reference layout of GNSS antenna traces ..............54 Figure 3-54 Specifications of MM9329-2700RA1 ................55 Figure 3-55 RF connections ......................55 Figure 3-56 Pulse wave for an incoming call ................... 59 Copyright © Neoway Technology Co., Ltd...
  • Page 7 Figure 6-1 N75 dimensions ......................70 Figure 6-2 N75 label ......................... 71 Figure 7-1 Bottom view ........................74 Figure 7-2 Recommended Application Foot Print (Top View) ............75 Figure 7-3 SMT furnace temperature curve ..................76 Copyright © Neoway Technology Co., Ltd...
  • Page 8 Table 4-2 Current consumption of N75 .................... 63 Table 4-3 Temperature features ....................... 65 Table 4-4 ESD protection features ....................65 Table 5-1 Operating Bands ......................66 Table 5-2 RF TX power ........................67 Copyright © Neoway Technology Co., Ltd...
  • Page 9 It defines the features, indicators, and test standards of the N75 module and provides reference for the hardware design of each interface. Reference designs in this document are only for reference. Customers should design applications based on actual scenarios and conditions. Please contact Neoway FAE if you have any questions or doubts. Audience This document is intended for system engineers (SEs), development engineers, and test engineers.
  • Page 10 Means reader be careful. In this situation, you might perform an action that could result in module or product damages. Means note or tips for readers to use the module Related Documents Neoway_N75_Datasheet Neoway_N75_Product_Specifications Neoway_N75_AT_Command_Mannual Neoway_N75_EVK_User_Guide Copyright © Neoway Technology Co., Ltd...
  • Page 11: About N75

    GNSS functions, N75 is well applicable to wireless metering terminals, in-vehicle terminals, POS, industrial routers, and other IoT terminals. 1.1 Product Overview The N75 series includes multiple variants. Table 1-1 lists the variants and frequency bands supported. Table 1-1 Variant and frequency bands Variant...
  • Page 12: Block Diagram

    ANT_DIV ANT_GNSS RF Front-end VBAT (PA/ASW/DUP/SAW) RF transceiver TRX&MIPI RFFE I/F S Power UART Manager VBAT VDDs I2S/PCM PWRKEY Base Band SPMI GPIO RESET VDDs VDDs for PM_GPIOs SDIO SGMII MEMORY SUPPORT 19.2M crystal Copyright © Neoway Technology Co., Ltd...
  • Page 13: Basic Features

    LTE: (23 dBm± 2 dB) (Power Class 3) 2G/3G/4G antenna interface, diversity antenna interface, GNSS antenna interface Application 50Ω impedance interface Two UART interfaces: one is an ordinary serial port, and one is used for Bluetooth by default Copyright © Neoway Technology Co., Ltd...
  • Page 14 One SGMII/MDIO interface, used for Ethernet Four GPIO interfaces AT command Neoway extended commands Data PPP, RNDIS, ECM, RMNET Protocol TCP, UDP, MQTT, FTP/FTPS, HTTP/HTTP(S), SSL, TLS Certification FCC, PTCRB, AT&T, CE-R*, GCF, RoHS*, NCC*, RCM* approval Copyright © Neoway Technology Co., Ltd...
  • Page 15: Module Pins

    There are 100 pins on N75 and their pads are introduced in the LGA package. 2.1 Pad Layout Figure 2-1 shows the pad layout of the N75 module. Figure 2-1 N75 pin definition (Top View) Copyright © Neoway Technology Co., Ltd...
  • Page 16: Pin Description

    1.2V, =-0.3V~0.35*V High: 0.9 mA 1.8V, and VBAT. They are -0.45)V~V Medium: 0.6 mA used for output because their =0V~0.45V Low: 0.15 mA IO cannot adapt automatically. is GPIO voltage, 1.2V/1.8V/VBAT) Copyright © Neoway Technology Co., Ltd...
  • Page 17: Table 2-2 Pin Description

    Triggered by a low level Embedded with diode ON/OFF button switch and a 200 kΩ PWRKEY_N (recommended) pull-up resistor Around 0.8V when the pin is floating UART Interface UART5_TXD UART5 data transmitting Used for data Copyright © Neoway Technology Co., Ltd...
  • Page 18 SGMII transmit minus SGMII_TX_P SGMII transmit plus Leave this pin floating if it is not used. SGMII_RX_N SGMII receive minus SGMII_RX_P SGMII receive plus MDIO Control Interfaces SGMII_VCC USIM2 power output For MDIO data line to Copyright © Neoway Technology Co., Ltd...
  • Page 19 WLAN_SDIO_DATA_3 SDIO data3 IO if it is not used. Leave this pin floating WAKE_ON_WIRELESS WLAN wakeup if it is not used. Leave this pin floating WLAN_SLEEP_CLK Wi-Fi sleep clock if it is not used. Copyright © Neoway Technology Co., Ltd...
  • Page 20 SDC command Leave them floating if they are not used. SDC_CLK SDC clock output SDC_DATA0 SDC data0 IO SDC_DATA1 SDC data1 IO Leave this pin floating SDC_DET SD card detect if it is not used. Copyright © Neoway Technology Co., Ltd...
  • Page 21 Leave this pin floating NET_LIGHT Network status indicator if it is not used. Leave this pin floating GNSS_LNA_EN GNSS LNA enable if it is not used. RESERVED Leave it floating Copyright © Neoway Technology Co., Ltd...
  • Page 22: Application Interfaces

    GSM/GPRS mode. The voltage will encounter a drop in such a situation. The module might restart if the voltage drops lower than 3.3V. Figure 3-1 shows the current peaks and voltage drop. Copyright © Neoway Technology Co., Ltd...
  • Page 23: Figure 3-1 Current Peaks And Voltage Drops (Gsm/Gprs)

    5.5V-24V (12V typically, output by vehicle battery) ⚫ Figure 3-2 shows the schematic design recommended for 3.3V-4.3V input. Figure 3-2 Recommended design 1 Test point VBAT I_max Power Supply Module Close to the pin of the module Copyright © Neoway Technology Co., Ltd...
  • Page 24: Figure 3-3 Recommended Design 2

    If a digital NPN bipolar transistor is used, Omit R1 and R2. TVS diodes work in the same way as those in Figure 3-2 and they should meet the same ⚫ requirements. Figure 3-4 shows the schematic design recommended for 4.3V-5.5V input. Copyright © Neoway Technology Co., Ltd...
  • Page 25: Figure 3-4 Recommended Design 3

    500 kHz or larger switching frequency is recommended for DC-DC. The inductance depends on ⚫ the switching frequency. The switching frequency might produce EMC noise and it determines the performance of end products. Copyright © Neoway Technology Co., Ltd...
  • Page 26 Place sensitive components far away from the SW pin in case of noise coupling. Place feeding components as close to FB pin and COMP pin as possible. Connect GND pins and bottom pads to the ground to optimize heat sink and separate noise. ⚫ Copyright © Neoway Technology Co., Ltd...
  • Page 27: Dvdd_1P8

    Triggered by a low level N75 provides PWRKEY_N and RESET_N to power up and reset the module respectively. 3.2.1 PWRKEY_N N75 allows startup by the following controls: Button ⚫ ⚫ Automatic startup after powered up ⚫ Copyright © Neoway Technology Co., Ltd...
  • Page 28: Figure 3-6 Reference Design Of Startup Controlled By Button

    If you use the automatic startup design in Figure 3-8, shut down the module by turning off the power supply. Do NOT use AT to shut down the module. Otherwise, the system might be malfunction. Copyright © Neoway Technology Co., Ltd...
  • Page 29: Figure 3-9 N75 On/Off Timing

    3.2.2 RESET_N. For how to power off through software, see Neoway_N75_AT_Command_Manual. Figure 3-9 N75 on/off timing Power Power Inactive Active Inactive VBAT t >2s t >200ms PWRKEY_N <0.6V <0.6V RESET_N Active Inactive Inactive All Interfaces Active Inactive Inactive Time Copyright © Neoway Technology Co., Ltd...
  • Page 30: Reset_N

    Q304 RESET_N VCC_2P8/3P0/3P3 R317 R318 module 4.7kΩ 4.7kΩ VDD_1P8 Figure 3-12 shows the reset timing of the N75 module. Figure 3-12 Reset timing of N75 VBAT RESET_N t 1s <0.6V Active Inactive All Interfaces Copyright © Neoway Technology Co., Ltd...
  • Page 31: Peripheral Interfaces

    Used for OTG function The USB interface can be used to download firmware for N75 and establish data communication for commissioning. The module can be used as a USB Device. It is an option for customers. The Copyright © Neoway Technology Co., Ltd...
  • Page 32: Figure 3-13 Usb Connection

    1 pF if possible. To enter sleep mode, shut down USB_VBUS. Add a switch to USB_VBUS to control it by MCU. ⚫ See Figure 3-14. For the switch circuit, see Figure 3-3. Copyright © Neoway Technology Co., Ltd...
  • Page 33: Usim

    N75 provides one USIM1 interface by default. USIM2 interface is a multiplex function of an Ethernet interface and compatible with 1.8V/3.0V USIM card. For details, see Section 3.7 MUX Interfaces. Figure 3-15 shows the reference design of the USIM card interface. Copyright © Neoway Technology Co., Ltd...
  • Page 34: Figure 3-15 Reference Design Of Usim Card Interface

    Place the USIM card close to the module and USIM traces should be as short as possible. ⚫ Place ESD protection resistors and components close to the USIM card. ⚫ Surround USIM traces with ground to enhance EMC capability. ⚫ Copyright © Neoway Technology Co., Ltd...
  • Page 35: Uart

    UART5_RXD MCU_TXD UART5_TXD MCU_RXD Schematic Guidelines Note the match of signals. ⚫ If the UART does not match the logic voltage of the MCU, add a level shifting circuit outside of ⚫ the module. Copyright © Neoway Technology Co., Ltd...
  • Page 36: Figure 3-18 Recommended Level Shifting Circuit 1

    If the low level at MCU_UART (V ) is higher than 200 mV, use the recommended level shifting circuit 2. Otherwise, the low level at UART might be higher than required, resulting in failure to identify signals. Copyright © Neoway Technology Co., Ltd...
  • Page 37: Figure 3-19 Recommended Level Shifting Circuit 2

    Level shift chip is recommended if the level of MCU is higher than 3.3V or the baudrate is greater than 1 MHz. Figure 3-20 Recommended level shifting circuit 3 VDD_1P8 VCC_IO IO_VCC1 IO_VL1 MCU_RXD UART_TXD IO_VL2 IO_VCC2 UART_RXD MCU_TXD VDD_1P8 0.1μF NLSX4373 0.1μF Copyright © Neoway Technology Co., Ltd...
  • Page 38: Sdc

    SD is a dual-voltage SD3.0 interface, which supports a read rate of up to 104 MB/s and an ordinary SD card. Table 3-3 SD card feature parameters Mode IO Level (V) Max Clock Frequency (MHz) Timing Mode DS, HS, SDR12, SDR25, SDR50, SDR104 1.8/3.0 DDR50 Copyright © Neoway Technology Co., Ltd...
  • Page 39: Figure 3-21 Sd Connection

    SDC_DET pin after an SD card is installed in the card connector. As shown in Figure 3-21, SDC_DET is floating before an SD card is inserted and grounded after an SD card is inserted, and the level at SDC_DET changes from high to low. Copyright © Neoway Technology Co., Ltd...
  • Page 40: Figure 3-22 Sdc Sdr Timing

    Figure 3-22 SDC SDR timing SDC_CLK t(csurd) t(chrd) t(dsurd) t(dhrd) Read t(pddwr) t(cdvrd) t(pdcwr) t(dvrd) Write Figure 3-23 SDC DDR timing SDC_CLK t(chrd) t(csurd) Command Read t(pdcwr) Command Write t(dsurd) t(dhrd) DATA Read t(pddwr) t(pddwr) DATA Write Copyright © Neoway Technology Co., Ltd...
  • Page 41: I2S/Pcm

    I2S data transmit Multiplexed as PCM_DOUT I2S_1_DIN I2S data receive Multiplexed as PCM_DIN I2S_1_WS I2S word select Multiplexed as PCM_SYNC N75 provides one I2S/PCM multiplex interface that supports 1.8V. Figure 3-24 shows the I2S connection. Copyright © Neoway Technology Co., Ltd...
  • Page 42: Figure 3-24 I2S Connection

    Keep I2S traces far away from areas that might introduce ESD. ⚫ Surround I2S_MCLK signal traces with ground. ⚫ The I2S function complies with Phillips I2S Bus Specifications revised June 5, 1996. Figure 3-25 I2S timing t(LC) t(HC) SCLK t(htr) Dout t(dtr) t(sr) t(hr) Copyright © Neoway Technology Co., Ltd...
  • Page 43: Figure 3-26 Pcm Connection

    Figure 3-26 PCM connection PCM_DOUT PCM_DIN PCM_DOUT PCM_DIN PCM_SYNC PCM_SYNC PCM_CLK PCM_CLK Codec N75 module The guidelines of schematic design and PCB layout are the same as those of I2S. The PCM interface supports only standard modes. Copyright © Neoway Technology Co., Ltd...
  • Page 44: Figure 3-27 Pcm Sync Signal Timing In Primary Mode

    PCM_SYNC valid time μs t(syncd) PCM_SYNC invalid time 124.5 t(clk) PCM_CLK cycle t(clkh) PCM_CLK high time t(clkl) PCM_CLK low time Set-up time from PCM_SYNC high to t(susync) PCM_CLK low t(sudin) Set-up time from PCM_DIN high to Copyright © Neoway Technology Co., Ltd...
  • Page 45: Figure 3-30 Pcm Sync Signal Timing In Auxiliary Mode

    MSB-1 (Companded) AUX_PCM_DIN MSB-1 MSB-2 MSB-8 (Linear) Figure 3-32 PCM data output timing in auxiliary mode t(auxclk) t(auxclkh) AUX_PCM_CLK t(hauxsync) t(suauxsync) AUX_PCM_SYNC t(pauxdout) AUX_PCM_DOUT MSB-1 LSB+1 (Companded) AUX_PCM_DOUT MSB-1 MSB-6 MSB-7 MSB-8 LSB+1 (Linear) Copyright © Neoway Technology Co., Ltd...
  • Page 46: Spi

    Leave this pin floating if it is not used. The SPI interface operates at 1.8 V. It supports a maximum frequency of 50 MHz and only mater mode. Figure 3-33 shows the SPI connection. Copyright © Neoway Technology Co., Ltd...
  • Page 47: Figure 3-33 Spi Connection

    Surround signal traces with ground. ⚫ Figure 3-34 and Table 3-9 shows SPI timing and parameters respectively. Figure 3-34 SPI timing SPI _ CS _ N SPI _ CLK t(mov) SPI _ MOSI t(mis) t(mih) SPI _ MISO Copyright © Neoway Technology Co., Ltd...
  • Page 48: I2C

    Its feature parameters and connection are shown in the following table and figure. Table 3-10 I2C feature parameters IO Level (V) Mode Max. Speed Standard-mode 100 kbit/s 1.8V (VDD) Fast-mode 400 kbit/s Fast-mode Plus 1 Mbit/s Copyright © Neoway Technology Co., Ltd...
  • Page 49: Figure 3-35 I2C Connection

    Keep I2C traces far away from areas that might introduce ESD. ⚫ Surround signal traces with ground. ⚫ The following figures and tables show the I2C data transmission, I2C timing, and parameters. ⚫ Figure 3-36 I2C data transmission Copyright © Neoway Technology Co., Ltd...
  • Page 50: Figure 3-37 I2C Timing

    Fall time for SCL and SDA μs Set-up time for STOP condition SU;STO Bus free time between STOP and μs START condition μs Data invalid time 3.45 VD;DAT μs Data invalid acknowledge time 3.45 VD;ACK Copyright © Neoway Technology Co., Ltd...
  • Page 51: Table 3-12 I2C Timing Parameters (Fast Mode)

    Rise time for SCL and SDA Fall time for SCL and SDA 6.55 Set-up time for STOP condition 0.26 SU;STO Bus free time between STOP and START condition Data invalid time 0.45 VD;DAT Data invalid acknowledge time 0.45 VD;ACK Copyright © Neoway Technology Co., Ltd...
  • Page 52: Network And Connection

    PCB Design Guidelines Place these DC blocking capacitors close to the RX pins on the PCB, e.g. C1 and C2 close to ⚫ the PHY chipset while C3 and C4 close to the module. Copyright © Neoway Technology Co., Ltd...
  • Page 53: Figure 3-39 Connection Between Mdio And Phy

    Figure 3-39 shows the connection between MDIO and PHY chipset. Figure 3-39 Connection between MDIO and PHY R353 SGMII_VCC 1.5kΩ MDIO_DATA MDIO_DATA MDIO_CLK MDIO_CLK ETH_RST_N RST_N R354 VDD_1P8 10kΩ ETH_INT_N INT_N N75 module PHY chipset Copyright © Neoway Technology Co., Ltd...
  • Page 54: Wlan

    WLAN chipset oscillator. DVDD_XO_1P8 1.8V power output Do not use it to load any other components. WLAN_SDIO_CMD SDIO command Clock signal output of SDIO WLAN_SDIO_CLK interface WLAN_SDIO_DATA0 SDIO data bit 0 WLAN_SDIO_DATA1 SDIO data bit 1 Copyright © Neoway Technology Co., Ltd...
  • Page 55: Figure 3-42 Wlan Connection

    WLAN uses SDIO 3.0 interface. Figure 3-42 shows the WLAN connection. Figure 3-42 WLAN connection VBAT WLAN Power POWER WLAN_PWR_EN WLAN_SDIO_CLK SDIO_CLK SDIO_CMD WLAN_SDIO_CMD SDIO_DATA0 WLAN_SDIO_DATA0 WLAN_SDIO_DATA1 SDIO_DATA1 WLAN_SDIO_DATA2 SDIO_DATA2 WLAN_SDIO_DATA3 SDIO_DATA3 WLAN_EN WLAN_EN LTE_UART_RXD WCI_LTE_TXD WCI_LTE_RXD LTE_UART_TXD WLAN_SLEEP_CLK SLEEP_CLK N75 module WLAN chipset Copyright © Neoway Technology Co., Ltd...
  • Page 56: Figure 3-43 Sdio Sdr Timing

    Figure 3-43 SDIO SDR timing SD_CLK t(csurd) t(chrd) t(dsurd) t(dhrd) Read t(pddwr) t(cdvrd) t(pdcwr) t(dvrd) Write Figure 3-44 SDIO DDR timing SD_CLK t(chrd) t(csurd) Command Read t(pdcwr) Command Write t(dsurd) t(dhrd) DATA Read t(pddwr) t(pddwr) DATA Write Copyright © Neoway Technology Co., Ltd...
  • Page 57: Bluetooth

    Leave this pin floating if it is BT_PWR_EN power not used. N75 communicates with Bluetooth chipset through UART for data transmission. To use Bluetooth audio, connect one set of PCM signals (pins 65 to 68). See section 3.7 MUX Interfaces. Copyright © Neoway Technology Co., Ltd...
  • Page 58: Figure 3-45 Bluetooth Connection

    The Bluetooth audio function is implemented through a PCM interface. If the PCM interface is ⚫ used, leave I2S_MCLK floating. PCB Design Guidelines Refer to the PCB design guidelines of UART and PCM. ⚫ Copyright © Neoway Technology Co., Ltd...
  • Page 59: Rf Interface

    L network, T network, or pi network is mandatory in between. Pi network is recommended. Figure 3-46 L network ANT_MAIN (ANT_DIV) module Figure 3-47 Split capacitor network ANT_MAIN (ANT_DIV) module Copyright © Neoway Technology Co., Ltd...
  • Page 60: Figure 3-48 Pi Network

    Note the distance between ANT_MAIN and ANT_DIV in case of EMI jamming to each other. ⚫ On the PCB, keep the RF signals and components far away from high-speed circuits, power ⚫ supplies, transformers, great inductors, the clock circuit, etc. Copyright © Neoway Technology Co., Ltd...
  • Page 61: Ant_Gnss Interface

    ANT_GNSS (92) is the GNSS RF interface of N75, which requires a characteristic impedance of 50Ω. Figure 3-50 shows the GNSS structure inside the module. Figure 3-50 GNSS RF structure ANT_GNSS WTR GNSS Interface N75 module Copyright © Neoway Technology Co., Ltd...
  • Page 62: Figure 3-51 Reference Design Of Passive Gnss Antenna

    Reference design of active GNSS antenna After the antenna receives GNSS satellite signals, the LNA amplifies the signals first and then transmits them to the ANT_GNSS pin of N75 through feeder and PCB traces. See Figure 3-52. Copyright © Neoway Technology Co., Ltd...
  • Page 63: Figure 3-52 Reference Design Of Active Gnss Antenna

    For PCB design guidelines between GNSS interface and antenna, refer to design guidelines in section ANT_MAIN/ANT_DIV antenna interface. ⚫ 50Ω impedance is required for the feeder and PCB traces and the traces should be as short as ⚫ possible. Copyright © Neoway Technology Co., Ltd...
  • Page 64: Antenna Assembling

    Planar Inverted F Antenna (PIFA). Keep external RF wires far away from all disturbing sources, especially digital signals and DC/DC power if using RF wires. The following methods are commonly used to assemble antenna: GSC RF connector ⚫ Copyright © Neoway Technology Co., Ltd...
  • Page 65: Gpio

    N75 provides 4 GPIO pins, two among which support interrupt. Do not connect GPIO_78 or GPIO_79 to the power supply through a pull-up resistor before the module is started. Otherwise, the module will enter download mode forcibly once detecting high level or current input at this pin during startup. Copyright © Neoway Technology Co., Ltd...
  • Page 66: Mux Interfaces

    GPIO_34 UART5_TXD GPIO_8 SPI_MOSI_BLSP5 UART5_RXD GPIO_9 SPI_MISO_BLSP5 Do not pull up these pins to high level before the module is started completely. otherwise, the module cannot start up successfully. GP_CLK indicates clock pulse signal. Copyright © Neoway Technology Co., Ltd...
  • Page 67 BT_UART_TXD GPIO_0 UART3_TXD SPI_MOSI_BLSP3 BT_UART_RXD GPIO_1 UART3_RXD SPI_MISO_BLSP3 BT_UART_CTS GPIO_2 UART3_CTS SPI_CS_N_BLSP3 BT_UART_RTS GPIO_3 UART3_RTS SPI_CLK_BLSP3 Pull up this pin to high level before the module is started, and the module enter USB_BOOT mode. Copyright © Neoway Technology Co., Ltd...
  • Page 68 GPIO_54 SDC_DET GPIO_26 46 pins of N75 allow multiplexing and all of them can be used as GPIO. Please use their default functions if you do not have any special requirements in your application. Copyright © Neoway Technology Co., Ltd...
  • Page 69: Other Interfaces

    Once a voice call is incoming, the UART port outputs "RING" character strings and meanwhile the RING pin outputs a negative pulse with a width of 30 ms and a period of 5 seconds. Figure 3-56 Pulse wave for an incoming call 30 ms 30 ms Copyright © Neoway Technology Co., Ltd...
  • Page 70: Dtr

    2: Allow to enter sleep mode Enter sleep mode at high level Exits from sleep mode at low level Pull DTR low Whether the module Processing current is in idle state services Enter sleep mode and disable all interfaces Copyright © Neoway Technology Co., Ltd...
  • Page 71: Figure 3-59 Incoming Call Service Process

    MCU pulls DTR pin low MCU pulls DTR pin to Figure 3-61 Process of exiting from sleep mode Sleep mode MCU pulls DTR high UART enabled AT+ENPWRSAVE=0 Forbid sleep mode Exits from sleep mode Copyright © Neoway Technology Co., Ltd...
  • Page 72: Usb_Boot

    Reserve this pin to facilitate software upgrade and debugging. Figure 3-62 shows the reference design of this pin. Figure 3-62 Reference design of USB_BOOT DVDD_1P8 USB_BOOT 10kΩ 10kΩ ESD1 ESD2 Add an ESD component to protect USB_BOOT in the circuit. Copyright © Neoway Technology Co., Ltd...
  • Page 73: Electric Feature And Reliability

    LTE Paying cycle = 320 ms NA/NF/A LTE Paying cycle = 640 ms LTE Paying cycle = 1.28s LTE Paying cycle = 2.56s 1.67 GSM850 Voice Call PCL=5 Active Mode GSM1900 Voice Call PCL=0 GPRS850 1DL/4UL PCL=5 Copyright © Neoway Technology Co., Ltd...
  • Page 74 LTE-TDD Band66@ Max Tx power LTE-TDD Band71@ Max Tx power μA Power OFF Shut down the module. Sleep Mode WCDMA Active Mode μA Power OFF Shut down the module. Sleep Mode WCDMA Active Mode Copyright © Neoway Technology Co., Ltd...
  • Page 75: Temperature Features

    Air Discharge VBAT ± 8 kV ± 15 kV ± 8 kV ± 15 kV ± 8 kV ± 15 kV Cover ± 8 kV ± 15 kV Others ± 2 kV ± 4 kV Copyright © Neoway Technology Co., Ltd...
  • Page 76: Rf Features

    880~915 MHz 925~960 MHz FDD-LTE B12 699~716 MHz 728~746 MHz FDD-LTE B13 777~787 MHz 746~757 MHz FDD-LTE B14 788~798 MHz 758~768 MHz FDD-LTE B20 832~862 MHz 791~821 MHz FDD-LTE B25 1850~1915 MHz 1930~1995 MHz Copyright © Neoway Technology Co., Ltd...
  • Page 77: Tx Power And Rx Sensitivity

    FDD-LTE B7 23 dBm+2/-2 dBm <-95.5 dBm FDD-LTE B8 23 dBm+2/-2 dBm <-98 dBm FDD-LTE B12 23 dBm+2/-2 dBm <-95 dBm FDD-LTE B13 23 dBm+2/-2 dBm <-95 dBm FDD-LTE B14 23 dBm+2/-2 dBm <-95 dBm Copyright © Neoway Technology Co., Ltd...
  • Page 78: Gnss Features

    Cold start (in air) <35s Update frequency 1 Hz by default CNRin/CNRout 3 dB Max. positioning altitude 18000m Max. positioning speed 515 m/s Max. positioning acceleration GNSS data type NMEA-0183 GNSS antenna type Passive/active antenna Copyright © Neoway Technology Co., Ltd...
  • Page 79 Tracking sensitivity, acquisition sensitivity, and re-acquisition sensitivity were obtained in a signaling test on SPIRENT6300 and they are the maximum values of multiple tests on samples. No external LNA or active antenna was used in the test. Copyright © Neoway Technology Co., Ltd...
  • Page 80: Mechanical Features

    N75 Hardware User Guide Chapter 6 Mechanical Features 6 Mechanical Features This chapter describes the mechanical features of N75. 6.1 Dimensions Figure 6-1 N75 dimensions The unit is mm. Copyright © Neoway Technology Co., Ltd...
  • Page 81: Label

    N75 modules are packaged in sealed vacuum bags with dryer, humidity card, and tray on delivery to guarantee a long shelf life. Follow the same package method again in case of opened for any reason. 6.3.1 Reel&Tape N75 in mass production is shipped in the following package. Copyright © Neoway Technology Co., Ltd...
  • Page 82 N75 Hardware User Guide Chapter 6 Mechanical Features N75 module Tape Copyright © Neoway Technology Co., Ltd...
  • Page 83: Moisture

    90 degrees for more than 12 hours before SMT. Or, if the indication card shows humidity greater than 20%, the baking procedure is also required. Do not bake modules with the package tray directly. Copyright © Neoway Technology Co., Ltd...
  • Page 84: Mounting N75 Onto The Application Board

    N75 is introduced in a 100-pin LGA package. This chapter describes N75 footprint, recommended PCB design and SMT information to guide users on how to mount the module onto the application PCB board. 7.1 Bottom Dimensions Figure 7-1 Bottom view Copyright © Neoway Technology Co., Ltd...
  • Page 85: Application Foot Print

    It is easy to cause voiding for LGA and LCC inside the module after the second reflow soldering. When using only solder pastes with lead, please ensure that the reflow temperature is kept at ⚫ 220 °C for more than 45 seconds and the peak temperature reaches 240 °C. Copyright © Neoway Technology Co., Ltd...
  • Page 86: Smt Furnace Temperature Curve

    Reflow zone: >220 °C, Time: 40-90 s ⚫ Peak temperature: 235-245 °C ⚫ Neoway will not provide a warranty for heat-responsive element abnormalities caused by improper temperature control. For information about cautions in N75 storage and mounting, refer to Neoway Module Reflow Manufacturing Recommendations.
  • Page 87: Safety Recommendations

    ⚫ with other electronic equipment. Please follow the requirements below in application design: Do not disassemble the module without permission from Neoway. Otherwise, we are entitled to ⚫ refuse to provide further warranty. Please design your application correctly by referring to the HW design guide document and our ⚫...
  • Page 88: Conformity And Compliance

    Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense. Copyright © Neoway Technology Co., Ltd...
  • Page 89: Fcc Class B Digital Device Notice

    Increase the separation between the equipment and receiver. ⚫ Connect the equipment into an outlet on a circuit different from that to which the receiver is ⚫ connected. Consult the dealer or an experienced radio/TV technician for help. ⚫ Copyright © Neoway Technology Co., Ltd...
  • Page 90: Abbreviation

    GLOBAL NAVIGATION SATELLITE SYSTEM GNSS Global Navigation Satellite System GPIO General-Purpose Input/Output GPRS General Packet Radio Service Global Positioning System Global System for Mobile Communications HSPA+ High-Speed Packet Access Inter-integrated Circuit Inter-IC Sound International Electrotechnical Commission Copyright © Neoway Technology Co., Ltd...
  • Page 91 Secure Digital Input Output Single Date Rate SGMII Serial Gigabit Media Independent Interface Serial Peripheral Interface Secure Sockets Layer Transmission Control Protocol Time Division Duplex TD-SCDMA Time Division-Synchronous Code Division Multiple Access Transport Layer Security Copyright © Neoway Technology Co., Ltd...
  • Page 92 User Datagram Protocol USIM Universal Subscriber Identity Module UMTS Universal Mobile Telecommunications System Universal Serial Bus USB-OTG Universal serial bus on-the-go WCDMA Wide-band Code Division Multiple Access Wireless Coexistence Interface WLAN Wireless Local Area Network Copyright © Neoway Technology Co., Ltd...

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