Espressif ESP32­-S3 Series Hardware Design Manuallines page 23

High-performance wi-fi and bluetooth 5 (le) socs
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3 PCB Layout Design
• Please add a stub between the ground and the capacitors near the chip to suppress second harmonics. It
is preferable to keep the stub length 15 mil, and determine the stub width according to the number of PCB
layers, so that the characteristic impedance of the stub is 100 Ω ± 10%. In addition, please connect the
stub via to the third layer, and maintain a keep-out area on the first and second layers. The trace
highlighted in Figure
• The ground plane on the adjacent layer needs to be complete. Do not route any traces under the RF trace
whenever possible.
• There should be no high-frequency signal traces routed close to the RF trace. The RF antenna should be
placed away from high-frequency components, such as crystals, DDR, high-frequency clocks, etc. In
addition, the USB port, USB-to-serial chip, UART signal lines (including traces, vias, test points, header
pins, etc.) must be as far away from the antenna as possible. The UART signal line should be surrounded
by ground copper and ground vias.
Espressif Systems
20
is the stub. Note that a stub is not required for package types above 0201.
Figure 19: ESP32­S3 PCB Stack up Design
Figure 20: ESP32­S3 Stub in a Four­layer PCB Design
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ESP32-S3 Series Hardware Design Guidelines v1.0

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