Rtc (Optional); Schematic For The Oscillator; Schematic For The External Crystal (Rtc) - Espressif ESP32­-S3 Series Hardware Design Manuallines

2 Schematic Checklist
Oscillator
If an oscillator is used, its output should be connected to XTAL_P on the chip through a series inductor (a 20 nH
inductor can be used initially). XTAL_N can be floating. Make sure that the oscillator output is stable and its
accuracy is within ±10 ppm. It is recommended that the circuit design for the oscillator is compatible with the
3
crystal. In case of defects in the circuit design, you can still use the crystal. The circuit for the oscillator is shown
in Figure 7.
VDD33
R1
10K(NC)
R3 499
Notice:
Defects in the manufacturing of crystal and oscillators (for example, large frequency deviation of more than ±10 ppm,
unstable performance within operating temperature range, etc) may lead to the malfunction of ESP32-S3, resulting in a
decrease of the RF performance.
C10
0.1uF
GND

2.4.2 RTC (optional)

42
ESP32-S3 supports an external 32.768 kHz crystal or an external signal (e.g., an oscillator) to act as the RTC
41
40
sleep clock. Figure
39
38
37
36
35 R16 0
SPID
34
R15 0
SPIQ
33 R10 0
32
31
R14 0
30 R13 0
29
C14
C13
0.1uF 1uF
GND GND
Notice:
• Please note the requirements for the 32.768 kHz crystal.
– Equivalent series resistance (ESR) ⩽ 70 kΩ.
– Load capacitance at both ends should be configured according to the crystal's specification.
• The parallel resistor R is used for biasing the crystal circuit (5 MΩ < R ⩽ 10 MΩ). In general, you do not need to
populate the resistor.
• If the RTC source is not required, then the pins for the external 32.768 kHz crystal can be used as other GPIOs.
Espressif Systems
3
2
VDD33
R4 0
C1
10nF
GND
GPIO46
Figure 7: Schematic for the Oscillator
GPIO45
U0RXD
U0TXD
GPIO42
GPIO41
GPIO40
GPIO39
GPIO38
VDD33
GPIO37
GPIO36
GPIO35
8 shows the schematic for the external 32.768 kHz crystal.
GPIO34
GPIO33
GPIO47
C17
GPIO48
SPID
SPIQ SPICS0 1
/CS
SPICLK
SPICS0 SPICLK 6
32.768kHz
CLK
SPIWP
SPIHD SPIHD 7
/HOLD
C18
U2
VDD_SPI
Figure 8: Schematic for the External Crystal (RTC)
2
Y1
4 3
VDD OUT
1 2
Tri-State GND
40MHz(±10ppm)
15
16
VDD_SPI
17
18
TBD 19
20
5 SPID
21
GPIO15
DI
X1
GPIO16 22
2 SPIQ
DO 23
24
3 SPIWP
/WP
TBD 25
26
FLASH-3V3
27
28
GND
12
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1
XTAL_P
L3 TBD
GND
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
VDD3P3_RTC
XTAL_32K_P
XTAL_32K_N
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
SPICS1
ESP32-S3 Series Hardware Design Guidelines v1.0
1
D
C
GN
VDD
VDD
XTAL_
XTAL_
GPIO4
GPIO4
U0RX
U0TX
MTM
MTD
VDD3P3_CP
B
MTDO
MTC
GPIO3
A