HL-1040
Fig. 2-5 shows the block diagram of the main PCB.
A S I C
CPU Core
(MC68EC000)
Oscillator (15.3MHz)
Reset Circuit
BUS
INT
Address Decoder
DRAM Control
Program + Font ROM
512 Kbytes
Timer
RAM
(2.0 Mbytes)
FIFO
DATA EXTENSION
Option Serial I/O
(RS232C & RS422A)
To PC
CDCC Parallel I/O
Soft Support
EEPROM (128
8 bits)
EEPROM I/O
Motor Driver
Engine Control I/O
To Panel Sensor PCB
Fig. 2-5
II-5