Adc Interface - Quectel BC68 Manual

If the DTE is 3.0V or 3.3V power domain, a reference design of 3.3V level match for BC68 is shown as
below.
Figure 13: Reference Design of BC68 UART Interface for 3.3V System
NOTES
1. In order to reduce the power consumption of the system, it is highly recommended to add resistors
with resistance greater than 1KΩ on the UART port signal traces when the host's voltage level is 3.0V
or 3.3V.
2. It is recommended to reserve the test points (RXD, TXD, RESET and VBAT) for firmware upgrading.

4.8. ADC Interface

The pin ADC* of BC68 module and the pin ADC0 of M66 provide a 10-bit ADC input channel to read the
voltage value. In addition, M66 offers an AVDD pin to provide a reference voltage for ADC0 and the max
voltage of AVDD is 2.8V. In order to improve the accuracy of ADC, the layout of ADC should be
surrounded by ground.
NOTE
"*" means under development.
BC68&M66_Compatible_Design
BC68
RXD
TXD
RI
GND
VBAT
VBAT TXD RXD
GND
RESET RESET
TEST POINTS
GSM/GPRS/NB-IoT Module Series
BC68&M66 Compatible Design
DTE
1K
TXD
1K
RXD
1K
RI
GND
Voltage level: 3.3V
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