Seco COM-Express CCOMe-C79 User Manual page 62

Carrier board for type 7 module on atx form factor

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external BMC

NCSI_TXD0: NC-SI Transmit Data #0 Input, from external BMC to Network Controller placed on Type 7 modules

NCSI_TXD1: NC-SI Transmit Data #1 Input, from external BMC to Network Controller placed on Type 7 modules

NCSI_CRS_DV: NC-SI Carrier Sense/Receive Data Valid Output, from Network Controller placed on Type 7 modules to external BMC

NCSI_TX_EN: NC-SI Transmit Enable Input, from external BMC to Network Controller placed on Type 7 modules

NCSI_RX_ER: NC-SI Receive Error Output, managed by Network Controller placed on Type 7 modules

NCSI_ARB_IN: NC-SI Hardware arbitration Input from external BMC to Network Controller placed on Type 7 modules

NCSI_ARB_OUT: NC-SI Hardware arbitration Output from Network Controller placed on Type 7 modules to external BMC

LPC_CLK: LPC Clock Output 33MHz

LPC_RST#: when jumper JP3 is inserted, this signal is derived by CB_RESET# signal or simply by biasing it using a Ultra High Speed CMOS buffer. When jumper

JP3 is not inserted, this signal is derived by an eSPI to LPC bridge placed on carrier board. Active low Output signal

LPC_AD[0:3]: LPC address, command and data bus, bidirectional signal

LPC_FRAME#: LPC Frame indicator, active low output line. This signal is used to signal the start of a new cycle of transmission, or the termination of existing cycles

due to abort or time-out condition

LPC_DRQ0#: LPC serial DMA request input signal

LPC_SERIRQ#: LPC Serialised IRQ request, bidirectional signal

PCIE_BMC_CLK+/PCIE_BMC_CLK-: PCI Express Reference Clock, Differential Pair. This signal is obtained by a zero-delay clock buffer placed on Carrier Board.

BMC_CLK_REQ#: PCI Express Clock Request Input. This signal shall be driven correctly by any module inserted in the BMC connector, in order to ensure that the

PCI-e clock buffer available on the carrier board makes available the reference clock for the external BMC module. +3.3V_RUN electrical level

resistor

PCIE_BMC_RST#: Reset Input Signal for external BMC module, derived by CB_RESET# using a Ultra High Speed CMOS buffer. Active low signal, +3.3V_ALW

electrical level with a 100k pull down resistor

PCIE_BMC_RX3+ / PCIE_BMC_RX3-: PCI Express lane #3, Receiving Input Differential pair

PCIE_BMC_TX3+ / PCIE_BMC_TX3- : PCI Express lane #3, Transmitting Output Differential pair

CCOMe-C79

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