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Appendix A 56858EVM Schematics Appendix B 56858EVM Bill of Material DSP56858EVM User Manual, Rev. 3 Freescale Semiconductor...
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LIST OF FIGURES Block Diagram of the 56858EVM........1-2 56858EVM Jumper Reference .
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DSP56858EVM User Manual, Rev. 3 Freescale Semiconductor...
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LIST OF TABLES 56858EVM Default Jumper Options ........1-3 SPI Port Connector Description .
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DSP56858EVM User Manual, Rev. 3 Freescale Semiconductor...
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Appendix B, 56858EVM Bill of Material - provides a list of the materials used on the 56858EVM board Suggested Reading More documentation on the 56858 and the 56858EVM kit may be found at URL: www.freescale.com Preface, Rev. 3 Freescale Semiconductor...
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Notation Conventions This manual uses the following notational conventions: Term or Value Symbol Examples Exceptions Active High Signals No special symbol (Logic One) attached to the signal CLKO name Active Low Signals Noted with an In schematic drawings, (Logic Zero) overbar in text and in Active Low Signals may be most figures...
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Definitions, Acronyms, and Abbreviations Definitions, acronyms and abbreviations for terms used in this document are defined below for reference. COder/DECoder; a part used to convert analog signals to digital (coder) and digital Codec signals to analog (decoder) Dual Inline Package Electrically Erasable Programmable Read-Only Memory EEPROM Enhanced On-Chip Emulation;...
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Serial Peripheral Interface; a communications port on Freescale’s family of controllers SRAM Static Random Access Memory Synchronous Serial Interface; a communications port on Freescale’s family of controllers Total Harmonic Distortion Universal Serial Bus Wait State References The following sources were referenced to produce this manual: [1] DSP56800E Reference Manual, DSP56800ERM, Freescale Semiconductor [2] DSP5685x 16-Bit Digital Signal Processor User’s Manual, DSP5685xUM, Frees- cale Semiconductor...
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Chapter 1 Introduction The 56858EVM is used to demonstrate the abilities of the 56858 and to provide a hardware tool allowing the development of applications that use the 56858. The 56858EVM is an evaluation module board that includes a 56858 part, 16-bit stereo codec, USB 1.1/2.0 interface, external memory and a daughter card expansion interface.
56858EVM can be used to develop real-time software and hardware products based on the 56858. The 56858EVM provides the features necessary for a user to write and debug software, demonstrate the functionality of that software and interface with the customer's application-specific device(s).
56858EVM Configuration Jumpers 1.2 56858EVM Configuration Jumpers Ten jumper groups, (JG1-JG11), shown in 1-2, are used to configure various features on Figure the 56858EVM board. describes the default jumper group settings. Table 1-1 JG10 JG11 JTAG RESET DSP56858EVM RE10519B REV JG11 JG10 IRQA...
1.3 56858EVM Connections An interconnection diagram is shown in for connecting the PC and the external Figure 1-3 +12.0V DC/AC power supply or external +5.0V DC lab power supply to the 56858EVM board. Parallel Extension Cable 56858EVM PC-compatible Computer Connect cable to Parallel/Printer port +5.0V External...
The power of the 16-bit 56858 controller, combined with the on-board 128K 16-bit external program/data static RAM (SRAM), 128K 16-bit external data/program SRAM, RS-232 interface, Stereo 16-bit codec interface, USB 2.0 interface, Daughter Card Expansion interface...
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The 56858EVM uses a Freescale DSP56858FV120 part, designated as U1 on the board and in the schematics. This part will operate at a maximum speed of 120MHz. A full description of the 56858, including functionality and user information, is provided in these documents: • DSP56858 Technical Data, (DSP56858): Provides features list and specifications,...
Additionally, CS0 can be configured to assign this memory’s size and starting address to any modulo address space. This memory bank will operate with one wait state access while the 56858 is running at 120MHz and can be disabled by removing the jumper at JG1.
2-3. This memory connects directly to the SPI Figure Port through a header on the 56858. It can be used to load program code and data into the 56858’s internal or external memory spaces. Jumper block JG10 is provided to allow the user to disconnect the on-board SPI EEPROM/Data FLASH from the SPI port and allow him to connect his own SPI port peripheral.
P3. Flow control is not provided, but could be implemented using uncommitted GPIO signals. The pinout of connector P3 is listed Table 2-2. The RS-232 level converter/transceiver can be disabled by placing a jumper at JG9. RS-232 56858 Level Converter Interface TXD0 T1in...
The 56858EVM uses a 4.00MHz crystal, Y1, connected to its external crystal inputs, EXTAL and XTAL. To achieve its 120MHz maximum operating frequency, the 56858 uses its internal PLL to multiply the input frequency by 30. An external oscillator source can be connected to the controller by using the oscillator bypass connectors, JG3 and JG4;...
RESET. Refer to the DSP56858 User’s Manual for a complete description of the chip’s operating modes. shows the two operation modes Table 2-3 available on the 56858. Table 2-3. Operating Mode Selection Operating Mode S4 (ON) Comment 1–2, 3-4 &...
Debug Support Setting PD0, PD1, PD2, PD3, PD4 or PD5 to a Logic One value will turn on the associated LED. 56858 INVERTING BUFFER +3.3V RED LED YELLOW LED GREEN LED RED LED YELLOW LED GREEN LED Figure 2-6. Schematic Diagram of the Debug LED Interface 2.8 Debug Support...
The JTAG connector on the 56858EVM allows the connection of an external Host Target Interface for downloading programs and working with the 56858’s registers. This connector is used to communicate with an external Host Target Interface which passes information and data back and forth with a host processor running a debugger program.
Debug Support 2.8.2 Parallel JTAG Interface Connector The Parallel JTAG Interface Connector, P1, allows the 56858 to communicate with a Parallel Printer Port on a Windows PC; reference 2-7. Using this connector, the user can Figure download programs and work with the 56858’s registers.
2-8. S1 allows the user to generate a hardware interrupt for signal line IRQA. S2 allows Figure the user to generate a hardware interrupt for signal line IRQB. These two switches allow the user to generate interrupts for his user-specific programs. +3.3V 56858 IRQA 0.1µF +3.3V IRQB 0.1µF...
2.10 Reset Logic is provided on the 56858 to generate an internal Power-On RESET. The 56858EVM provides reset logic to support the RESET signals from the JTAG connector, the Parallel JTAG Interface and the user RESET push-button; refer to Figure 2-9.
56858EVM is indicated with a Power-On LED, referenced as LED7. Power +5.0V DC +5.0V CODEC +12.0V DC Condition Analog Regulator +3.3V +3.3V DC 56858 +5.0V DC Regulator 56858EVM PARTS 56858 +1.8V +1.8V DC CORE Regulator Figure 2-10. Schematic Diagram of the Power Supply Technical Summary, Rev.
2.12 Stereo Codec A 16-bit audio-quality stereo codec, Crystal Semiconductor CS4218, is connected to the 56858’s ESSI port to support audio, voice and signal analysis applications. The codec is clocked with a 12.288MHz oscillator. This allows the codec to operate between a sample frequency of 8KHz and 48KHz.
Stereo Codec 2.12.1 Analog Input/Output The 56858EVM uses jacks for line-level stereo input, line-level stereo output and stereo headphone output. A National Semiconductor LM4880 provides the drive required for the use of headphones. This device offers a THD, which is superior by a factor of two to the CS4218’s on-chip headphone drive circuitry.
PC3 as the Control Chip Select signal, CCS; PE2 as the Control Data Input signal, CDIN; and PE3 as the Control Clock signal, CCLK. CODEC Enable Logic 56858 CS4218 STD0 SDIN...
Daughter Card Connectors Table 2-10. GPIO Port Connector Description Pin # Controller Signal Pin # Codec Signal CDIN CCLK 2.13 Daughter Card Connectors The EVM board contains two daughter card expansion connectors. One connector, J1, contains the controller’s external memory bus signals. The other connector, J2, contains the controller’s peripheral port signals.
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Table 2-11. Memory Daughter Card Connector Description (Continued) Pin # Signal Pin # Signal +3.3V +3.3V +5.0V DSP56858EVM User Manual, Rev. 3 2-20 Freescale Semiconductor...
+5.0V 2.14 USB A USB version 2.0 interface controller, NetChip NET2270, is connected to the 56858’s external address/data bus via CS3. The NET2270 is clocked with a 30.00MHz crystal. This allows the NET2270 interface controller to support the USB Full Speed (12 Mb/sec USB version 1.1) along with the USB High Speed (480 Mb/sec USB version 2.0) bus transfer rates.
Test Points 2.15 Host Interface Connector The 56858EVM board contains a Host Interface connector. The HI connector, J4, provides the signals present on the 56858’s HI port. shows the HI connectors signal-to-pin Table 2-13 assignments. Table 2-13. Host Interface Connector Description...
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DSP56858EVM User Manual, Rev. 3 2-24 Freescale Semiconductor...
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Description Ref. Designators Vendor Part #s Diodes S2B-FM401 Vishay, DL4001DICT +50V 1A BRIDGE RECT DIODES, DF02S Capacitors 0.33 F C1, C6 SMEC, MCCE334K3NR-T1 470pF C2, C4 SMEC, MCCE471J2NO-T1 1.0 F, +25V DC C3, C5, C14, C16, C18-C22 SMEC, MCCE105K3NR-T1 0.0022 F C7, C8 SMEC, MCCE222K2NR-T1 0.47 F...
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Description Ref. Designators Vendor Part #s Test Points Black Test Point TP1, TP3, TP6, TP7 Keystone, 5001 Red Test Point Keystone, 5000 White Test Point Keystone, 5002 Yellow Test Point Keystone, 5004 Crystals 4.00MHz Crystal CTS, ATS04ASM-T 30.00MHz Crystal Epson, MA-306 30.000M-C2 Connectors DB25M Connector AMPHENOL, 617-C025P-AJ121...
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INDEX Clock Source FSRAM Codec Preface-ix Connectors Host Interface 2-23 GPIO Preface-ix Daughter Card Connectors 2-19 Preface-ix Daughter Card Expansion interface Host Parallel Interface Connector Debugging Host Target Interface Preface-ix DSP56858EVM +12.0V DC power supply 2-15 1 M-bit Serial EEPROM/Data FLASH Preface-ix 128Kx16-bit of memory 16-bit +1.8V/+3.3V Digital Signal Processor...
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Preface-ix Preface-ix power supply, external Preface-ix Preface-ix RS-232 interface level converter schematic diagram RS-232 Serial Communications Preface-ix Preface-x SRAM Preface-x external data external program Preface-x stereo 16-bit codec interface Stereo headphone interface Preface-x Preface-x 2-22 schematic diagram 2-22 Preface-x DSP56858EVM User Manual, Rev. 3 Index-2 Freescale Semiconductor...
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How to Reach Us: Home Page: www.freescale.com E-mail: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 +1-800-521-6274 or +1-480-768-2130 support@freescale.com Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen, Germany...
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