Block Diagram - Digital Audio Section (1/2) - Sony STR-DN1080 Service Manual

2020/11/17 21:24:35 (GMT+09:00)
6-5.

BLOCK DIAGRAM - DIGITAL AUDIO Section (1/2) -

HDMI_MTK_SD0, HDMI_MTK_SD1,
HDMI_MTK_SD2, HDMI_MTK_SD3,
HDMI_MTK_BCK, HDMI_MTK_LRCK,
HDMI_MTK_SPDIF, HDMI_EARC_SPDIF,
NW_HDMI_MUTE, NONPCM
HDMI_MTK_SD0
>013B
HDMI_MTK_SD1
(Page 52)
HDMI_MTK_SD2
HDMI_MTK_SD3
HDMI_MTK_BCK
HDMI_MTK_LRCK
NONPCM
NW_HDMI_MUTE
HDMI_MTK_SPDIF
HDMI_EARC_SPDIF
OPTICAL OPTICAL
RECEIVER
IN TV
IC1231
(ASSIGNABLE)
J101
COAXIAL IN
SA-CD/CD
(ASSIGNABLE)
L_IN
>015B
(Page 55)
DIR_SPDIF
>002B
(Page 49)
STR-DN1080/ZA810ES
A/D CONVERTER,
DIGITAL AUDIO INTERFACE RECEIVER
IC6002
6 DATAIN FL/FR_DSDFL 16
7 MPIN1
8 MPIN2 SL/SR_DSDC 19
9 MPIN3 C/SW_DSDSW 20
4 BCKIN SBL/SBR_DSDSR 21
5 LRCKIN DSDSL 22
12 MPIN6 LRCK_DSDFR 15
11 MPIN5 BCKOUT 14
10 MPIN4
61 RXIN3
60 RXIN4
62 RXIN2
WAVE
SHAPER 63 RXIN1
IC101
ERRF 23
45 ADINL
NPCMF 25
R-CH 44 ADINR
53 RXOUT
31 XOUT
X6000
24.576MHz
32 XIN
COUNTER
IC6004
39 38 37 36 24 35
119 121 120 118 111 113 122 127 100
DSD_NATIVE_BCLK
DSD_NATIVE_SL
DSD_NATIVE_SR
DSD_NATIVE_FR
DSD_NATIVE_SW
DSD_NATIVE_C
DSD_NATIVE_FL
DSP1
IC6501
94 L/R_IN L/R_OUT 88
100 DIR_IN SL/SR_OUT 87
95 SL/SR_IN C/SW_OUT 86
96 C/SW_IN SBL/SBR_OUT 73
101 SBL/SBR_IN
99 AD2CH_IN META_OUT 74
CONTROL_OUT 75
98 LRCK_IN
97 BCLK_IN BCLK_OUT 77
LRCLK_OUT 76
92 MCLK_IN
CLOCK
BUFFER
CLKIN 24
IC6503
135 FLAG1
136 FLAG2 FLAG3 138
SD-RAM
IC6500
16
DATA0 – DATA15 DQ0 – DQ15
A0 – A9,
13
ADDR0 – ADDR9,
A10/AP,
SDA10, ADDR11, ADDR12
A11, A12
SDCLK 1 4 159 1 7 38 CLK
SDCKE 1 3 3 4 1 37 CKE
SDRAS 1 6 172 18 4 0 RAS
SDCAS 175 1 5 17 3 9 CAS
SDWE 171 1 4 1 7 16 WE
ADDR17 1 3 32 4 1 20 BA0
ADDR18 35 1 6 4 0 21 BA1
MS0 1 5 2 19 3 9 CS
SDDQM 1 5 1 3 9 1 5 LDQM
3 9 3 9 UDQM
SERIAL FLASH
IC6502
39 38 14 40 43 42 134 173 2 5 6 1 7
D6003
112 106 107 108 105 109 104
SYSTEM CONTROLLER
IC3002 (5/10)
53 53
DSP2
IC7001
94 Chset#1_IN L/R2_OUT 88
95 Chset#2_IN SL/SR2_OUT 87
96 Chset#3_IN C/SW2_OUT 86
101 Chset#4_IN REC_OUT 89
L/R_EXT1_OUT 73
100 META_IN L/R_EXT2_OUT 74
99 CONTROL_IN L/R_EXT3_OUT 75
97 BCLK_IN BCLK_OUT 77
98 LRCK_IN LRCLK_OUT 76
92 MCLK_IN
X6500
25MHz
24 CLK_IN
135 FLAG1
136 FLAG2 FLAG3 138
DATA0 – DATA15
ADDR0 – ADDR9,
SDA10, ADDR11, ADDR12
SDCLK 1 4 159
SDCKE 1 3 3
SDRAS 1 6 172
SDCAS 1 5 175
SDWE 1 4 171
ADDR17 1 3 32
ADDR18 35 1 6
MS0 1 5 2
SDDQM 1 5 1
39 38 14 40 43 42 134 173
103 110 8 9 10 24 16 23
STR-DN1080/ZA810ES
DSD_NATIVE_FL, DSD_NATIVE_FR, DSD_NATIVE_SL,
DSD_NATIVE_SR, DSD_NATIVE_C,
DSD_NATIVE_SW, DSD_NATIVE_BCLK
L/R2_OUT
SL/SR2_OUT
L/R2_OUT, SL/SR2_OUT, C/SW2_OUT,
C/SW2_OUT ZONE_L/R2_OUT, L/R_EXT1_OUT, L/R_EXT2_OUT,
L/R_EXT3_OUT, BCLK2_OUT, LRCLK2_OUT
ZONE_L/R2_OUT
L/R_EXT1_OUT
L/R_EXT2_OUT
L/R_EXT3_OUT
BCLK2_OUT
LRCLK2_OUT
R-ch is omitted due to same as L-ch.
SIGNAL PATH
: AUDIO
MCLK_IN3, DSP3_CLK,
CLK_IN, LOCK, DIR_ERRF3,
DSP2_ERROR
DSP2_ERROR
SD-RAM
IC7000
16
DQ0 – DQ15
A0 – A9,
13
A10/AP,
A11, A12
38 1 7 CLK
37 4 1 CKE
4 0 18 RAS
3 9 17 CAS
1 7 16 WE
20 4 1 BA0
21 4 0 BA1
3 9 19 CS
3 9 1 5 LDQM
3 9 3 9 UDQM
SERIAL FLASH
IC7002
2 5 6 1 7
DIR_XSTATE
22 11
(Page 55)
>016B
(Page 54)
>017B
>018B
(Page 54)
>019B
(Page 55)
SYS SET