Seco Qseven CQ7-A30 User Manual page 68

Cross platform carrier board for qseven rel.2.0 compliant modules
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Backlight and LCD PSU connector - CN3
Pin
Signal
1
LVDS_SW_VDD_FUSE
3
+5V_S (Fuse protected)
5
LVDS_VDD_EN
7
Analogic Dimming
9
GND
The suffix _FUSE means that these voltages are protected by a polyswitch resettable fuse.
Analogic_Dimming is a +5V signal, derived from the PWM signal LVDS_BLT_CTRL coming from Qseven
supporting PWM.
JP2 position
LVDS_SW_VDD_FUSE Voltage
1-2
+5V
LVDS
2-3
+3.3V
LVDS
JP1 position
LVDS_SW_BACK_FUSE Voltage
1-2
+12V
LVDS
2-3
+5V
LVDS
LVDS EEPROM socket - CN2
Pin
Signal
Pin
1
GND
8
2
GND
7
3
GND
6
4
GND
5
CQ7-A30
CQ7-A30 - Rev. First Edition: 1.0 - Last Edition: 2.0 - Author: S.B. - Reviewed by G.G. Copyright © 2016 SECO S.r.l.
Pin
Signal
2
LVDS_SW_BACK_FUSE
4
+12V_S (Fuse protected)
6
LVDS_BACKLIGHT_EN
8
LVDS_BLT_CTRL
10
GND
LCD software-driven voltage, i.e. signal LVDS_SW_VDD_FUSE, can also be regulated to be
connected to +5V
header, P2.54mm, 1x3 pin.
Similarly, backlight software-driven voltage, signal LVDS_SW_BACK_FUSE, can be regulated to be
connected to +12V
header, P2.54mm, 1x3 pin.
It could be possible that the TFT panel used on LVDS connection is not able to
communicate
synchronisation/configuration, or that it is necessary to use peculiar timing parameters.
Signal
In both these cases, it is possible to use a specific I2C EEPROM programmed with correct timing
+3.3V_S
data.
GND
For this purpose, an 8-pin DIP socket p2.54mm, type TE p/n 2-1571552-2 or equivalent is
LVDS_DID_CK
provided, with the pinout shown in the table on the left:
LVDS_DID_DAT
There is also dedicated connector for backlight / LCD PSU connector.
The connector, CN3, is an IDC connector, dual row, 10 pin, p2.54 mm
connector, type MOLEX p/n 70246-1004 or equivalent.
Mating connector: MOLEX p/n 22-25-2102 with 70058 series female crimp
terminals.
LVDS_SW_VDD_FUSE
and
LVDS_SW_BACK_FUSE
Switched_Backlight, i.e., these are the voltages that can be supplied to LCD and
backlight, respectively, and are enabled/disabled via the signals LVDS-PPEN and
LVDS_BLEN, respectively.
or +3.3V
, using module's jumper JP2, which is a standard pin
LVDS
LVDS
or +5V
, using module's jumper JP1, which is another standard pin
LVDS
LVDS
®
to
the
Qseven
module
mean
Switched_VDD
®
module, for direct analogic control of backlights not
its
parameters
for
and
correct
68

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