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+3.3V Auxiliary Power Rail
Wake signal for link reactivation
Not Connected
Power Ground
PCI-e lane #1 Transmitter +
PCI-e lane #1 Transmitter -
Power Ground
Hot Plug presence detect (needed to enable clock)
Power Ground
Description
+12V Power Rail
+12V Power Rail
+12V Power Rail
Power Ground
SM Bus Clock line
SM Bus Data line
Power Ground
+3.3V Power Rail
Not connected
+3.3V Auxiliary Power Rail
Wake signal for link reactivation
Not Connected
Power Ground
PCI-e lane #2 Transmitter +
PCI-e lane #2 Transmitter -
Power Ground
Hot Plug presence detect (needed to enable clock)
Power Ground
CQ7-A30
CQ7-A30 - Rev. First Edition: 1.0 - Last Edition: 2.0 - Author: S.B. - Reviewed by G.G. Copyright © 2016 SECO S.r.l.
+3.3V_A
B10
A10
PCIE_WAKE#
B11
A11
RSVD
B12
A12
GND
B13
A13
PCIE1_TX+
B14
A14
PCIE1_TX-
B15
A15
GND
B16
A16
PRSNT#2
B17
A17
GND
B18
A18
PCI-e x1 Slot #2 CN16
Pin name
Pin nr.
Pin nr.
+12V_S
B1
A1
+12V_S
B2
A2
+12V_S
B3
A3
GND
B4
A4
SMB_CLK
B5
A5
SMB_DAT
B6
A6
GND
B7
A7
+3.3V_S
B8
A8
N.C.
B9
A9
+3.3V_A
B10
A10
PCIE_WAKE#
B11
A11
RSVD
B12
A12
GND
B13
A13
PCIE2_TX+
B14
A14
PCIE2_TX-
B15
A15
GND
B16
A16
PRSNT#2
B17
A17
GND
B18
A18
+3.3V_S
+3.3V Power Rail
PCIE1_RST#
Reset signal to the add-in card
GND
Power Ground
PCIE_CLK1_REF+
PCI-e #1 reference clock lane +
PCIE_CLK1_REF-
PCI-e #1 reference clock lane -
GND
Power Ground
PCIE1_RX+
PCI-e lane #1 Receiver +
PCIE1_RX-
PCI-e lane #1 Receiver -
GND
Power Ground
Pin name
Description
GND
Hot Plug presence detect (tied to GND)
+12V_S
+12V Power Rail
+12V_S
+12V Power Rail
GND
Power Ground
N.C.
Not connected
N.C.
Not connected
N.C.
Not connected
N.C.
Not connected
+3.3V_S
+3.3V Power Rail
+3.3V_S
+3.3V Power Rail
PCIE2_RST#
Reset signal to the add-in card
GND
Power Ground
PCIE_CLK2_REF+
PCI-e #2 reference clock lane +
PCIE_CLK2_REF-
PCI-e #2 reference clock lane -
GND
Power Ground
PCIE2_RX+
PCI-e lane #2 Receiver +
PCIE2_RX-
PCI-e lane #2 Receiver -
GND
Power Ground
49
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