Siemens SIMATIC S7-400 Manual page 7

Table 5-16 Structure of station status 3 (Byte 2) ....................................................................................... 5-22
Table 5-17 Structure of the master PROFIBUS address (byte 3).............................................................. 5-23
Table 5-18 Diagnostic address for the recipient during direct data exchange........................................... 5-30
Table 5-19 Event detection of the 41x CPUs as recipients during direct communication ......................... 5-30
Table 5-20 Evaluation of the station failure in the sender during direct data exchange ............................ 5-31
Table 6-1 New System and Standard Functions/System and Standard Functions to be Replaced.......... 6-6
Table 6-2 System and Standard Functions in PROFIBUS DP that must be Implemented with
Different Functions in PROFINET IO ......................................................................................... 6-7
Table 6-3 OBs in PROFINET IO and PROFIBUS DP................................................................................ 6-7
Table 6-4 Comparison of the System Status Lists of PROFINET IO and PROFIBUS DP ........................ 6-8
Table 6-5 PROFINET IO address areas of the CPUs.............................................................................. 6-14
Table 8-1 Memory requirements ................................................................................................................ 8-2
Table 9-1 Cyclic program processing......................................................................................................... 9-1
Table 9-2 Factors that Influence the Cycle Time ....................................................................................... 9-3
Table 9-3 Portions of the process image transfer time .............................................................................. 9-4
Table 9-4 Operating System Scan Time at the Scan Cycle Checkpoint ................................................... 9-5
Table 9-5 Increase in cycle time by nesting interrupts............................................................................... 9-5
Table 9-6 Reducing the Response Time.................................................................................................. 9-18
Table 9-7 Example of Calculating the Response Time............................................................................ 9-20
Table 9-8 Calculating the Interrupt Response Time ................................................................................ 9-24
Table 9-9 Hardware Interrupt and Diagnostic Interrupt Response Times; Maximum Interrupt
Response Time Without Communication ................................................................................ 9-24
Table 9-10 Reproducibility of Time-Delay and Watchdog Interrupts of the CPUs..................................... 9-27
Table 9-11 Response time for acyclic interconnections............................................................................. 9-30
Table 11-1 Female connector IF1 IF 964-DP (9-pin D-sub) ...................................................................... 11-3
S7-400 Automation System, CPU Specifications
Manual, 10/2006, 6ES7498-8AA04-8BA0
Table of contents
vii