Xilinx Logicore Versions; Common Options In Block Parameters Dialog Box - Xilinx System Generator V2.1 Reference Manual

Xilinx LogiCORE Versions

The Xilinx LogiCORE
the System Generator) used in Xilinx System Generator v2.1 are listed below.
Accumulator
Addressable Shift
Register
Adder/Subtractor
CIC
Counter
Constant Multiplier
Convolutional
Encoder
DDS
Dual Port Ram
FIFO
FFT
FIR Filter
Interleaver/
Deinterleaver
Inverter
Logical
Multiplier (mult)
Mutiplexer (mux)
Negate
Relational
RS Decoder
RS Encoder
Sine Cosine
Single Port RAM
State Machines
ROM
Viterbi Decoder

Common Options in Block Parameters Dialog Box

Each Xilinx block has several configurable parameters, seen in the block parameters
dialog box. Many of these parameters are specific to that particular block. Those block
Common Options in Block Parameters Dialog Box
blocks (indicating the version numbers being supported by
Xilinx Block
ACCUMULATOR
RAM_SHIFT
ADDSUB
CIC
BINARY_COUNTER
MULT_GEN
CONVOLUTION
DDS
MEM_DP_BLOCK
SYNC_FIFO
FFT and MEM_DP_BLOCK
DA_FIR
INTERLEAVER
GATE_BUS
GATE_BUS
MULT_GEN
BUS_MUX
TWOS_COMP
COMPARE
RS_DECODER
RS_ENCODER
SIN_COS
MEM_SP_BLOCK and
DIST_MEM
MEM_SP_BLOCK and
DIST_MEM
MEM_SP_BLOCK and
DIST_MEM
VITERBI
Xilinx LogiCORE
Xilinx Blockset Overview
Version
V5.0
V5.0
V5.0
V1.0
V5.0
V4.0
V1.0
V4.0
V3.2
V3.0
V1.0 (Virtex, Spartan-II),
V2.0 (Virtex-II)
V3.2 (MEM_DP_BLOCK)
V6.0
V1.1
V5.0
V5.0
V4.0
V5.0
V5.0
V5.0
V2.0
V2.0
V3.0
V3.2(BRAM), V5.0 (dist.)
V3.2(BRAM), V5.0 (dist.)
V3.2 (BRAM), V5.0 (dist.)
V1.0
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