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3.2 Configuration of LCD Controller/Driver
The LCD controller/driver consists of the following hardware.
The LCD controller/driver includes of two blocks: LCDSEG block for controlling segments, and LCDCTL block for
controlling LCD register setting and mode setting.
Item
LCD
Display outputs
controller/
driver
Display block
(LCDSEG)
Control block
(LCDCTL)
Microcontroller
18
CHAPTER 3 LCD CONTROLLER/DRIVER
Table 3-2. Configuration of LCD Controller/Driver
Segment signals: 36 (52-pin product), 40 (64-pin product)
Common signals: 4 (COM0 to COM3)
36 byte RAM (52-pin product),
40 byte RAM (64-pin product)
LCD mode setting register (LCDMD)
LCD display mode register (LCDM)
LCD clock control register (LCDC)
LCD voltage boost control register 0 (VLCG0)
Figure 3-1. Configuration of LCD Controller/Driver
SCL
2
I
C Bus Interface
SDA
Reset Input
f
Clock Input
LCLK
User's Manual U18438EJ2V0UD
Configuration
µPD71312
LCD Controller
LCDSEG
LCDCTL
LCD Driver
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