Seco COMe-C55-CT6 User Manual page 36

Com express type 6 module with the intel 8 th generation core and celeron 4000 cpus

Table of Contents

3.2.5.7

LVDS Flat Panel signals

The Intel

generation Core or Celeron 4000 series processors offers three Digital Display Interfaces, of which the first is able to support natively embedded

Display Port (eDP). Conversely, the LVDS interface, which is frequently used in many application fields, is not directly supported by these CPUs.

For this reason, considering that LVDS interface can be multiplexed on the same pin with the eDP interface, on COMe-C55-CT6 module can be implemented an

eDP to LVDS bridge (NXP PTN3460), which allow the implementation of a Dual Channel LVDS, with a maximum supported resolution of 1920x1200 @ 60Hz (dual

channel mode).

Please remember that LVDS interface is not native for the Intel

optional eDP-to-LVDS bridge. Depending on the factory option purchased, on the same pins it is possible to have available LVDS first channel or

eDP interface.

Please take care of specifying if LVDS interface or eDP is needed, before placing an order of COMe-C55-CT6 module.

Here following the signals related to LVDS management:

LVDS_A0+/LVDS_A0-: LVDS Channel #A differential data pair #0.

LVDS_A1+/LVDS_A1-: LVDS Channel #A differential data pair #1.

LVDS_A2+/LVDS_A2-: LVDS Channel #A differential data pair #2.

LVDS_A3+/LVDS_A3-: LVDS Channel #A differential data pair #3.

LVDS_A_CLK+/LVDS_A_CLK-: LVDS Channel #A differential clock.

LVDS_B0+/LVDS_B0-: LVDS Channel #B differential data pair #0.