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Schematic Diagrams
Processor 6/12
D
GSPI_MOSI[0:1] Default strap low.
STRAP PIN
HIGH
LOW
PCH_GPP_B18
C
STRAP PIN
Flash Descriptor Security Overide
Sheet 7 of 46
Low = Enable security measures defined in the Flash Descriptor. (Default)
High = Disable Flash Descriptor Security (override)
B
26
Processor 6/12
A
B - 8 Processor 6/12
5
4
U25F
No
Reboot
CC27
GPP_B15/GSPI0_CS0#
Enable
"No
Reboot"
mode
CC32
29
TPM_PIRQ#
GPP_A7/PIRQA#/GSPI0_CS1#
PCH_GPP_B16
CE28
T16
GPP_B16/GSPI0_CLK
Disable
"No
Reboot"
PCH_GPP_B17
CE27
T35
PCH_GPP_B18
GPP_B17/GSPI0_MISO
mode(Default)
CE29
GPP_B18/GSPI0_MOSI
CA31
R200
*100K_04
CA32
GPP_B19/GSPI1_CS0#
CC29
GPP_A11/PME#/GSPI1_CS1#/SD_VDD2_PWR_EN#
GPP_B20/GSPI1_CLK
CC30
GPP_B21/GSPI1_MISO
PCH_GPP_B22
CA30
T14
GPP_B22/GSPI1_MOSI
CK20
27
CNVI_BRI_RSP
CG19
GPP_F5/CNV_BRI_RSP
27
CNVI_RGI_DT
CJ20
GPP_F6/CNV_RGI_DT
27
CNVI_BRI_DT
CH19
GPP_F4/CNV_BRI_DT
27
CNVI_RGI_RSP
GPP_F7/CNV_RGI_RSP
UART2_RXD
CR12
UART2_TXD
GPP_C20/UART2_RXD
CP12
CN12
GPP_C21/UART2_TXD
CM12
GPP_C22/UART2_RTS#
31
TP_ATTN#
R249
0_04
GPP_C23/UART2_CTS#
I2C
Address:
0x2C
CM11
31
I2C_SDA_TP
GPP_C16/I2C0_SDA
CN11
31
I2C_SCL_TP
GPP_C17/I2C0_SCL
CK12
GPP_C18/I2C1_SDA
D01A
CJ12
GPP_C19/I2C1_SCL
CF27
T23
CF29
GPP_H4/I2C2_SDA
T22
GPP_H5/I2C2_SCL
CH27
GPP_H6/I2C3_SDA
CH28
GPP_H7/I2C3_SCL
CJ30
CJ31
GPP_H8/I2C4_SDA
For
BIOS
Debug
GPP_H9/I2C4_SCL
VDD3
R499
*10K_04
UART2_RXD
R501
*10K_04
UART2_TXD
D01A
BOT
D19
RB751S-40H
R459
1K_04
A
C
ME_W E
R466
33_04
BN34
25
HDA_SYNC
R464
33_04
BN37
25
HDA_BITCLK
R465
33_04
BN36
25
HDA_SDOUT
BN35
25
HDA_SDIN0
C381
*10p_25V_NPO_02
BL36
R463
33_04
HDA_RST#1
BL35
25
AZ_RST#_R
CK23
T32
BL37
D01A
BL34
CJ32
27
CNVI_RST#
CH32
CH29
27
CNVI_CLKREQ
CH30
CP24
31
GPPC_DMIC_CLK
CN24
31
GPPC_DMIC_DATA
CK25
CJ25
R504
*10mil_04
PCH_HDA_SPKR
CF35
25
PCH_SPKR
STRAP PIN
Top
Swap
Override
LOW
=
Disable
(Default)
STP_A16OVR
HIGH
=Enable
Top
Swap
mode
PCH_HDA_SPKR
3.3VS
R505
*10K_04
5
4
3
CN22
SW I#_R
GPP_D9/ISH_SPI_CS#/GSPI2_CS0#
CR22
GPP_D10/ISH_SPI_CLK/GSPI2_CLK
CM22
GPP_D11/ISH_SPI_MISO/GSPI2_MISO
CP22
PCH_GPP_D12
GPP_D12/ISH_SPI_MOSI/GSPI2_MOSI
CK22
GPP_D5/ISH_I2C0_SDA
CH20
GPP_D6/ISH_I2C0_SCL
CH22
GPP_D7/ISH_I2C1_SDA
CJ22
GPP_D8/ISH_I2C1_SCL
CJ27
GPP_H10/I2C5_SDA/ISH_I2C2_SDA
CJ29
GPP_H11/I2C5_SCL/ISH_I2C2_SCL
CM24
GPP_D13/ISH_UART0_RXD
CN23
GPP_D14/ISH_UART0_TXD
CM23
GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#
CR24
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
CG12
GPP_C12/UART1_RXD/ISH_UART1_RXD
CH12
GPP_C13/UART1_TXD/ISH_UART1_TXD
CF12
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
CG14
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
BW35
GPP_A18/ISH_GP0
BW34
GPP_A19/ISH_GP1
CA37
GPP_A20/ISH_GP2
CA36
GPP_A21/ISH_GP3
CA35
GPP_A22/ISH_GP4
CA34
GPP_A23/ISH_GP5
PCH_GPP_A12
BW37
GPP_A12/ISH_GP6/BM_BUSY#/SX_EXIT_HOLDOFF#
W HL_U_IP_CCG/BGA
6 of 20
U25G
CH36
HDA_SYNC/I2S0_SFRM
GPP_G0/SD_CMD
CL35
HDA_BCLK/I2S0_SCLK
GPP_G1/SD_DATA0
D01A
CL36
HDA_SDO/I2S0_TXD
GPP_G2/SD_DATA1
CM35
HDA_SDI0/I2S0_RXD
GPP_G3/SD_DATA2
CN35
HDA_SDI1/I2S1_RXD/SNDW1_DATA
GPP_G4/SD_DATA3
CH35
BOARD_ID
HDA_RST#/I2S1_SCLK/SNDW1_CLK
GPP_G5/SD_CD#
CK36
GPP_D23/I2S_MCLK
GPP_G6/SD_CLK
CK34
TBT Detect
GPP_G7/SD_WP
I2S1_SFRM/SNDW2_CLK
I2S1_TXD/SNDW2_DATA
GPP_H1/I2S2_SFRM/CNV_BT_I2S_BCLK/CNV_RF_RESET#
GPP_H0/I2S2_SCLK/CNV_BT_I2S_SCLK
GPP_H2/I2S2_TXD/CNV_BT_I2S_SDI/MODEM_CLKREQ
GPP_H3/I2S2_RXD/CNV_BT_I2S_SDO
BW36
GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7
BY31
GPP_D19/DMIC_CLK0/SNDW4_CLK
GPP_A16/SD_1P8_SEL
GPP_D20/DMIC_DATA0/SNDW4_DATA
CK33
SD_1P8_RCOMP
CM34
SD_RCOMP
R224
200_1%_04
GPP_D17/DMIC_CLK1/SNDW3_CLK
SD_3P3_RCOMP
GPP_D18/DMIC_DATA1/SNDW3_DATA
GPP_B14/SPKR
7 of 20
W HL_U_IP_CCG/BGA
3
2
1
R256
10K_04
3.3VA
R279
SW I#
26
*10mil_04
D01A
RTD3_PCIE_W AKE#
20
T33
R652
*10K_04
3.3VA
SATA_PW R_EN FROM PCH
R487
1K_04
SB_BLON
17
D01A
RTD3
GPP_C12_RTD3
28
SSD_PW R_DN#
28
TBTA_HRESET
23
TBT_PERST_N
20
D01A
T56
SATA_PW R_EN FROM PCH
29
PS8338B_SW
18
PS8338B_PCH
18
R193
*10K_04
3.3VA
3.3VS
TBT
HIGH
R286
10K_04
W /TBT
LOW
TBT Detect
R269
10K_04
W /O-TBT
LIGHT_KB_DET#
26
N13/N14
/N15
3.3VS
GPP_D11
R222
10K_04
W /TCM
BOARD_ID
R225
10K_04
W /O-TCM
!
!
!
!
!
!
!
!
!
!!DMFWP!DP/
!!DMFWP!DP/
!!DMFWP!DP/
Title
Title
Title
[07] WHL U F,G/20 GPIO/HDA
[07] WHL U F,G/20 GPIO/HDA
[07] WHL U F,G/20 GPIO/HDA
Size
Size
Size
Document Number
Document Number
Document Number
6-71-N15Z0-D01
6-71-N15Z0-D01
6-71-N15Z0-D01
A3
A3
A3
N150ZU
N150ZU
N150ZU
Date:
Date:
Date:
W ednesday, August 29, 2018
W ednesday, August 29, 2018
W ednesday, August 29, 2018
Sheet
Sheet
Sheet
2
1
D
3.3VS
C
B
Detect
W/TBT
W/O
TBT
BOARD
ID
HIGH
=N13/N14
LO
=N15
A
Rev
Rev
Rev
D01
D01
D01
7
7
7
of
of
of
46
46
46
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