Pcm Application Guide - Sunsea AIoT SIMCom SIM7600NA User Manual

Table 16: PCM timing parameters
Parameter Description
T(sync) PCM_SYNC cycle time
T(synch) PCM_SYNC high level time
T(syncl) PCM_SYNC low level time
T(clk) PCM_CLK cycle time
T(clkh) PCM_CLK high level time
T(clkl) PCM_CLK low level time
PCM_SYNC setup time high before falling edge of
T(susync)
PCM_CLK
PCM_SYNC hold time after falling edge of
T(hsync)
PCM_CLK
PCM_IN setup time before falling edge of
T(sudin)
PCM_CLK
T(hdin) PCM_IN hold time after falling edge of PCM_CLK
T(pdout) Delay from PCM_CLK rising to PCM_OUT valid
Delay from PCM_CLK falling to PCM_OUT
T(zdout)
HIGH-Z
3.8.2

PCM Application Guide

The following figure shows the external codec reference design.
SIM7600NA_user manual _V1.00
Figure 257: Module to EXT codec timing
41
Smart Machine Smart Decision
Min. Typ.
– 125
– 488
– 124.5 –
– 488
– 244
– 244
– 244
– 244
60 –
10 –
– –
– 160
2020-1-7
Max. Unit
– μs
– ns
μs
– ns
– ns
– ns
– ns
– ns
– ns
– ns
60 ns
- ns