Cpu Function - Honeywell Bendix/King KX 165A Maintenance Manual

Nav/comm transceiver
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BENDIX/KING
GS frequency band. Electronic tuning is provided by varactor CR2. The tuning voltage typically
ranges from 3.1 V to 4.8 V to cover the range of 329.12 MHz to 334.97 MHz. U7 is an MMIC buffer
amp that increases the power level of the VCO enough to drive the synthesizer and Mixer LO.
4.3.4.20
Voltage Reference
U12 generates a stable +5 V reference voltage that is used by the converter circuitry. The Flag
Driver and Indicator Driver use the +5 V reference directly. the GS Down voltage is derived from
dividing the +5 V in half to +2.5 V, and is then buffered through U10. The +2.5 V is the 0 ddm
reference voltage (GS Down). GS Up varies above and below this voltage to move the indicator
up and down.
4.3.4.21
Flag Driver
The Main Board sends serial data to U11 to operate the flag. U11-B is in one of two states. The
first state is with the flag in view, wiper connected to ground through pin 2. The second state is
with flag pulled out of view, wiper connected to +5 V through pin 3.
4.3.4.22
Indicator Driver
U9, U11-D, and U11-C form the active portion of the Indicator Driver. Digital potentiometer U11-
C adjusts the converter deviation. It allows the GS Up to be adjusted above or below GS Down's
2.5 V reference. the range of GS Up is 2.2 to 2.8 V (+/- 300 mV from GS Down). The 0 ddm cen-
tering voltage may be adjusted during Installation so that the Indicator's needle is centered for a
received 0 ddm GS signal. Digital potentiometer U11-D adjusts the half scale deflection. The half
scale deflection may be adjusted during Installation so that the indicator's needle reads half scale
for a received .091 ddm GS signal.
4.3.5

CPU FUNCTION

The CPU function consists of a microprocessor, RAM, ROM, an RS-232 asynchronous serial
communication port, and various discrete inputs and outputs. A general serial control bus was
created using CPU discrete I/Os to permit control of serial digital devices in the system; the integ-
rity of this bus is not effected by interrupts. The QSM serial control bus was reserved for front
panel control (display and front panel buttons/knobs) to simplify system software and minimize the
overhead incurred by display control. Refer to
4.3.5.1
CPU
The CPU is a Motorola 68HC16Z1 microprocessor, U1014, with several integrated functions. It
has a CPU16 core with 1MB address space made up of sixteen 64kbyte banks, and a maximum
clock speed of 16.78Mhz. A System Integration Module (SIM), provides address decoding, an in-
terrupt controller and discrete I/Os. The Queued Serial Module (QSM) contains synchronous and
asynchronous serial I/Os. A General Purpose Timer (GPT) module provides flexible timing func-
tions and, finally, an 8 channel Analog to Digital Convertor module (ADC), U1021, provides analog
inputs.
The clock provided to the processor is a crystal controlled 32.768 kHz, Y1001.
The CPU uses a 5.0 VDC precision reference, U1010, that supplies the CPU's ADC unit. There
is also a 5V power monitor, U1011, which resets the system if the voltage falls below a 4.75VDC
safety limit.
U1019, is a flash memory device that holds the software that controls the CPU. The flash memory
allows the unit to be reprogrammed via the RS-232 port at the rear connector as software up-
grades become available. U1002, U1006, U1008, and U1013 are RAM that interface to the CPU,
and serve as temporary storage for the CPU operation.
4.3.5.2
Configuration EEPROM
Rev 0, Jun/2000
figures 6-8,
the main board schematic .
15610M00.RCD
KX 165A
Page 4-41

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