Pcie Root Port 10(M.2 Keya) - Avalue Technology EMX-WHLGP User Manual

3.6.3.2.1.3

PCIe Root Port 10(M.2 KeyA)

Item
PCIe Root Port 10(M.2 KeyA)
ASPM 9
L1 Substates
PCIe Speed
Option
Disabled
Enabled[Default],
Disabled[Default]
L0s
L1
L0sL1
Auto,
Disabled
L1.1
L1.1 & L1.2[Default],
Auto[Default]
Gen1
Gen2
Gen3
Description
Control the PCI Express Root Port.
Set the ASPM Level: Force L0s - Force all
links to L0s State AUTO - BIOS auto
configure DISABLE - Disables ASPM.
PCI Express L1 Substates settings.
Configure PCIe speed.
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