Supermicro X10DRT-L User Manual page 13

Jumper Description
JBT1 Reset BIOS Configuration
JIB1 Infini-Band (IB) Enable (For X10DRT-LIBQ/LIBF)
JI C1/JI C2 SMB to PCI-E Slots
2 2
JPB1 BMC Enable
JPG1 VGA Enable
JPL1 GLAN1/GLAN2 Enable
JPME2 Manufacture (ME) Mode Select
JWD1 Watch Dog Timer Enable
Connectors
BT1 (Battery)
COM1
FAN1,3,4
InfiniBand Port
J4/J6
JF1
JIPMB1
JP3
JPI C1
2
JSD1/JSD2
JSTBY1
JTPM1
LAN1/LAN2
IPMI_LAN
I-SATA 0-5
S-SATA0-3
I-SGPIO1/2
S-SPGIO1
(CPU1) Slot1
UID
X10DRT-L/LIBQ/LIBF Jumpers
X10DRT-L/LIBQ/LIBF Connectors
Description
Onboard CMOS battery (See Chapter 3 for Used Battery Dis-
posal.)
Backplane COM Port1
CPU/system fan headers (Fan 1, Fan 3, Fan 4)
InfiniBand FDR/QDR connector on the IO backpanel (Option-
al for the X10DRT-LIBF/-LIBQ)
20-pin main power connectors (required)
Front control panel header
4-pin external BMC I
4-pin power connector for the HDD panel on Chassis 808/809
(required)
Power supply SMBbus I
SATA DOM (Disk-on-Module) power connectors 1/2
Standby power connector
TPM (Trusted Platform Module)/Port 80 header
G-bit Ethernet (GLAN) ports 1/2
IPMI_dedicated LAN support by the ASpeed controller
SATA 3.0 connections supported by Intel
SATA 3.0 connections (S-SATA0-3) supported by Intel
(Note: S-SATA2/S-SATA3: can be used as Supermicro Su-
perDOMs (-Disks-on-Module) with built-in power connectors)
Serial General-Purpose Input/Out connector headers for I-
SATA 0-5 (I-SGPIO1: I-SATA0-3, I-SGPIO2: I-SATA4/5)
Serial General-Purpose Input/Out connector header for S-
SATA 0-3
PCI-Express 3.0 x16 slot from CPU1 (JPICE1)
UID (Unit Identification) switch
1-5
C header (for an IPMI card)
2
C header
2
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Chapter 1: Overview
Default Setting
See Chapter 2
Pins 1-2 (Enabled)
Pins 2-3 (Disabled)
Pins 1-2 (Enabled)
Pins 1-2 (Enabled)
Pins 1-2 (Enabled)
Pins 1-2 (Normal)
Pins 1-2 (Reset)
PCH (I-SATA 0-5)
SCU
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