Atmel AT91SAM9 Application Note page 5

6300A–ATARM–09-Jul-07
According to the AT91SAM9 features, the maximum LCDDOTCK frequency is equal to the mas-
ter clock (in bypass mode).
The signal timings provided by the display specification must respect the timings supported by
the LCD Controller.
• Vertical pulse width from 1 to 64 lines.
• Horizontal pulse width from 1 to 64 dot clock cycles.
• Vertical Front Porch from 1 to 256 lines.
• Vertical Back Porch from 1 to 256 lines.
• Horizontal Front Porch from 1 to 2048 dot clock cycles.
• Horizontal Back Porch from 1 to 256 dot clock cycles.
Parameter
Vertical Front Porch
Vertical Back Porch
Horizontal Front Porch
Horizontal Back porch
Vertical Pulse Width
Horizontal Pulse Width
LCDVSYNC
LCDHSYNC
LCDHSYNC
LCDDOTCK
Min Max
1 256
1 256
1 2048
1 256
1 64
1 64
T4
T1
T5
T3
Active Area
Application Note
Unit Symbol
Line T0
Line T1
LCDDOTCK cycle T2
LCDDOTCK cycle T3
Line T4
LCDDOTCK cycles T5
T0 T4 T1
Vertical Blanking
T2 T5 T3
Horizontal Blanking
5