Atmel AT91 ARM Application Note

Migrating to an AT91SAM9G10-based System
from an AT91SAM9261S-based System
1. Scope
This application note specifies the migration path from the
AT91SAM9G10 microcontroller and describes the differences between them. These
variances lie in the Features, Clock Characteristics and Errata.
Note: throughout this document, shaded table cells refer to the AT91SAM9G10.
2. Features
The following list shows the AT91SAM9G10 features that differ from those of the
AT91SAM9261S:
®
•
ARM926EJ-S™ ARM Thumb
– CPU Frequency 266 MHz
•
PIO Controllers
– All the I/O Lines are Schmitt Trigger Inputs.
– all PIO Lines Multiplexed with EBI are VDDIOM Powered
•
Two-wire Interface (TWI)
– Compatible with Standard Two-wire Serial Memories
– One, Two or Three Bytes for Slave Address
– Sequential Read/Write Operations
– Master, Multi-master and Slave Mode Operation
– Bit Rate: Up to 400 Kbits
– General Call Supported in Slave Mode
– Connection to Peripheral DMA Controller (PDC) Channel Capabilities Optimizes
Data Transfers in Master Mode Only
•
Multimedia Card Interface (MCI)
– SDCard/SDIO and MultiMediaCard™ Compliant
•
LCD Controller Supports
– RGB Frame Buffer
All other features apply to AT91SAM9G10 and AT91SAM9261S microcontrollers.
3. Package
The AT91SAM9G10 is available in a 217-ball LFBGA package 15 x 15 mm (0.8 mm
ball pitch). The SAM9G10 and the SAM9261S are pin-to-pin compatible.
®
Processor with:
AT91SAM9261S to the
AT91 ARM
Thumb-based
Microcontrollers
Application Note
6440B–ATARM–22-Jul-10