Atmel AT91 ARM Application Note

Migrating to an AT91SAM9G20-based System
from an AT91SAM9260-based System
1. Scope
This application note specifies the migration from the
AT91SAM9G20 microcontroller and describes the differences between them. These
variances lie in the Features, Package, Power Supplies, Clock Characteristics, Bus
Matrix and Errata. In this document all shaded cells concern AT91SAM9G20.
2. Features
The following list shows the features of the AT91SAM9G20 that differ from the
AT91SAM9260.
®
•
ARM926EJ-S™ ARM Thumb
– 32-KByte Data Cache, 32-KByte Instruction Cache
– CPU Frequency 400 MHz
•
Additional Embedded Memories
– One 64-KByte internal ROM, Single-cycle Access at Maximum Matrix Speed
– Two 16-KByte internal SRAM, Single-cycle Access at Maximum Matrix Speed
•
ROM Boot from DataFlash
•
Ethernet MAC
– The RX FIFO and TX FIFO Sizes are Increased to 32 Words
•
Hardware ECC Controller Enhancement
•
PDC Channel on TWI controller
•
Selectable Drive to Control the I/Os Slew Rate on EBI Signals
•
PIO Controllers
– All the I/O Lines are Schmitt Trigger Inputs.
•
Required Power Supplies
– 0.9V to 1.1V for VDDBU, VDDCORE, VDDPLL
– 1.65 to 3.6V for VDDOSC
– 1.65V to 3.6V for VDDIOP (Peripheral I/Os)
– 3.0V to 3.6V for VDDUSB
– 3.0V to 3.6V VDDANA (Analog-to-digital Converter)
Other than those mentioned here, the features for the two microprocessors are the
same.
3. Package
The AT91SAM9G20 is available in a 217-ball LFBGA package 15 x 15 mm (0.8 mm
ball pitch). The AT91SAM9G20 and the AT91SAM9260 are pin-to-pin compatible,
only power supply pins differ.
®
Processor with:
®
, NAND Flash, Serial Flash, SD Memory Card and EEPROM
AT91SAM9260 to the
AT91 ARM
Thumb
Microcontrollers
Application Note
6415B–ATARM–03-Oct-08