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4.1.2
Debug interface connector (J5 - J6)
Table 4.5 Pin assignment of CPU board debug interface (J5)
1 2 3 4
Caution! The position of the pin 1 of the CN2-1 (J5) is as shown above. When you connect the ICDminiVer.2
to this board, pay attention to the direction of the connector.
Table 4.6 Pin assignment of CPU board interface connector (J6)
4 3 2 1
4.1.3
Power connector (J7 - J9)
Table 4.7 Pin assignment of CPU board power connector (J7)
Table 4.8 Pin assignment of CPU board power connector (J8)
Table 4.9 Pin assignment of CPU board power connector (J9)
S5U1C17564T Manual
(Rev.1.0)
No.
Pin name
1
DCLK
2
GND
3
DSIO
4
DST2
No.
Pin name
1
VPP
2
GND
3
RESET
4
VCCIN
No.
Pin name
1
HVDD
2
GND
No.
Pin name
1
LVDD
2
GND
No.
Pin name
1
AVDD
2
GND
Seiko Epson Corporation
I/O
O
Clock signal for debugging
-
Power (GND)
I/O
Input/Output signal for serial interface
for debugging
O
Debug status signal
I/O
Power input for flash memory
I
programming
-
Power (GND)
I
Reset signal input for the target
O
Target voltage output
I/O
Function
-
Power(+)
-
Power(GND)
I/O
Function
-
Power(+)
-
Power(GND)
I/O
Function
-
Power(+)
-
Power(GND)
4. Connector
Function
Function
13
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