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Aaeon EPIC-BT07 User Manual

Onboard intel atom / celeron processor soc ddr3l 1333 sodimm hdmi, vga, lvds, dp 5 usb 2.0, 1 usb 3.0, 6 com 1 sata, 1 sata/minicard
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E P I C B o a r d
E P I C - B T 0 7
EPIC-BT07
®
®
Onboard Intel
Atom™/Celeron
Processor SoC
DDR3L 1333 SODIMM
HDMI, VGA, LVDS, DP
5 USB 2.0, 1 USB 3.0, 6 COM
1 SATA, 1 mSATA/MiniCard
st
EPIC-BT07 Rev. A Manual 1
Ed.
August 5, 2015

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Summary of Contents for Aaeon EPIC-BT07

  • Page 1 E P I C - B T 0 7 EPIC-BT07 ® ® Onboard Intel Atom™/Celeron Processor SoC DDR3L 1333 SODIMM HDMI, VGA, LVDS, DP 5 USB 2.0, 1 USB 3.0, 6 COM 1 SATA, 1 mSATA/MiniCard EPIC-BT07 Rev. A Manual 1 August 5, 2015...
  • Page 2 AAEON assumes no liabilities resulting from errors or omissions in this document, or from the use of the information contained herein. AAEON reserves the right to make changes in the product design without notice to its users.
  • Page 3 E P I C B o a r d E P I C - B T 0 7 Acknowledgments All other products’ name or trademarks are properties of their respective owners. ®  is trademark of Advanced Micro Devices. ® ...
  • Page 4 Before you begin installing your card, please make sure that the following materials have been shipped: • DVD-ROM for manual (in PDF format) and drivers • EPIC-BT07 If any of these items are missing or damaged, please contact your distributor or sales representative immediately.
  • Page 5 E P I C B o a r d E P I C - B T 0 7 China RoHS Requirements 产品中有毒有害物质或元素名称及含量 AAEON Main Board/ Daughter Board/ Backplane 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI))
  • Page 6 E P I C B o a r d E P I C - B T 0 7 China RoHS Requirements Poisonous or Hazardous Substances or Elements in Products AAEON Main Board/ Daughter Board/ Backplane Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated...

  • Page 7: Table Of Contents

    E P I C B o a r d E P I C - B T 0 7 Contents Chapter 1 General Information 1.1 Introduction ..............1-2 1.2 Features ................1-3 1.3 Specifications ..............1-4 Chapter 2 Quick Installation Guide 2.1 Safety Precautions ............2-2 2.2 Mechanical Drawing ............2-3 2.3 Jumpers and Connectors ..........2-5 2.4 Block Diagram ...............2-7...
  • Page 8 E P I C B o a r d E P I C - B T 0 7 2.7 List of Connectors ............2-13 2.7.1 Stereo Audio Right Channel (CN1) ....2-15 2.7.2 RTC Battery Connector (CN2) ......2-15 2.7.3 4-Pin Power-In Connector (CN3) .......2-15 2.7.4 Stereo Audio Left Channel (CN7) ......2-16 2.7.5 2-Pin Power-In Connector (CN8) .......2-16 2.7.6 PCI-104 Connector (CN9) .........2-16...
  • Page 9 E P I C B o a r d E P I C - B T 0 7 2.7.24 COM Port 5 (CN32) .........2-36 2.7.25 SPI Programming Port (CN33) ......2-37 2.7.26 LVDS Port 1/ eDP (CN35) .......2-37 2.7.27 COM Port 4 (CN37) .........2-41 2.7.28 COM Port 3 (CN38) .........2-42 2.7.29 Front Panel Connector (CN39) ......2-45 2.7.30 10M/100M/1G Ethernet Port 1 (CN44) ....2-45...
  • Page 10 E P I C B o a r d E P I C - B T 0 7 B.1 I/O Address Map ............B-2 B.2 Memory Address Map ..........B-4 B.3 IRQ Mapping Chart ........... B-5 Appendix C Mating Connectors C.1 List of Mating Connectors and Cables......

  • Page 11: Chapter 1 General Information

    E P I C B o a r d E P I C - B T 0 7 Chapter General Information 1- 1 Chapter 1 General Information...

  • Page 12: Introduction

    (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the AAEON.com for the latest version of this document. 1- 2 Chapter 1 General Information...

  • Page 13: Features

    E P I C B o a r d E P I C - B T 0 7 1.2 Features  Onboard Intel® Atom™ E3845/ Celeron® J1900/ N2807 Processor SoC  DDR3L 1333 MHz SODIMM, up to 8 GB  Gigabit Ethernet x 2, RJ-45 x 2 ...

  • Page 14: Specifications

    E P I C B o a r d E P I C - B T 0 7 1.3 Specifications System EPIC Board Form Factor Onboard Intel® Atom™ E3845/ Celeron® Processor J1900/ N2807 Processor SoC 204-pin DDR3L 1333 MHz SODIMM, up to 8 System Memory Intel®...
  • Page 15 E P I C B o a r d E P I C - B T 0 7 Power Consumption (Typical) Board Size 165 x 115mm (6.5" x 4.5") 0.5 kg (1.2 lbs) Gross Weight 0 °C ~ 60 °C (32 °F ~ 140 °F) Operating Temperature -40°C ~ 80°C (-40°F ~ 176°F) Storage Temperature...
  • Page 16 E P I C B o a r d E P I C - B T 0 7 RS-232 x 4 Serial Port RS-232/422/485 x 2 (Ring/ +5V/ +12V) DI/O 16-bit digital I/O interface co-lay with LPT Port Audio Line-in, Line-out, Mic-in, 2W Audio Amp (optional) 1- 6 Chapter 1 General Information...

  • Page 17: Chapter 2 Quick Installation Guide

    E P I C B o a r d E P I C - B T 0 7 Chapter Quick Installation Guide Chapter 2 Quick Installation Guide...

  • Page 18: Safety Precautions

    E P I C B o a r d E P I C - B T 0 7 2.1 Safety Precautions Always completely disconnect the power cord from your board whenever you are working on it. Do not make connections while the power is on, because a sudden rush of power can damage sensitive electronic components.

  • Page 19: Mechanical Drawing

    E P I C B o a r d E P I C - B T 0 7 2.2 Mechanical Drawing Component Side Component Side Chapter 2 Quick Installation Guide...
  • Page 20 E P I C B o a r d E P I C - B T 0 7 Solder Side Solder Side Chapter 2 Quick Installation Guide...

  • Page 21: Jumpers And Connectors

    E P I C B o a r d E P I C - B T 0 7 2.3 Jumpers and Connectors Component Side Component Side Chapter 2 Quick Installation Guide...
  • Page 22 E P I C B o a r d E P I C - B T 0 7 Solder Side Solder Side Chapter 2 Quick Installation Guide...

  • Page 23: Block Diagram

    E P I C B o a r d E P I C - B T 0 7 2.4 Block Diagram Chapter 2 Quick Installation Guide...

  • Page 24: Setting Jumpers

    E P I C B o a r d E P I C - B T 0 7 2.5 Setting Jumpers You configure your card to match the needs of your application by setting jumpers. A jumper is the simplest kind of electric switch. It consists of two metal pins and a small metal clip (often protected by a plastic cover) that slides over the pins to connect them.

  • Page 25: List Of Jumpers

    E P I C B o a r d E P I C - B T 0 7 2.6 List of Jumpers The board has a number of jumpers that allow you to configure your system to suit your application. The table below shows the function of each of the board's jumpers: Label Function...

  • Page 26: Auto Power Button Selection (Cn3)

    E P I C B o a r d E P I C - B T 0 7 2.6.1 Auto Power Button Selection (CN3) 1 2 3 1 2 3 Disable Enable (Default) * When disabled, use CN39 (1-2) to power on the system. 2.6.2 PCI-104 VI/O Voltage Selection (CN4) 1 2 3 1 2 3...

  • Page 27: Lvds/Edp Backlight Control Selection (Cn18).2-11

    E P I C B o a r d E P I C - B T 0 7 2.6.5 LVDS/eDP Backlight Control Selection (CN18) 1 2 3 1 2 3 VR Mode (Default) PWM Mode 2.6.6 Touchscreen 4/5/8-wire Mode Selection (CN28) 1 2 3 5 Wires Mode 4/8 Wires Mode (Default)

  • Page 28: Lvds/Edp Operating Voltage Selection (Cn41)

    E P I C B o a r d E P I C - B T 0 7 2.6.9 LVDS/eDP Operating Voltage Selection (CN41) +3.3V (Default) 2-12 Chapter 2 Quick Installation Guide...

  • Page 29: List Of Connectors

    E P I C B o a r d E P I C - B T 0 7 2.7 List of Connectors The board has a number of connectors that allow you to configure your system to suit your application. The table below shows the function of each board's connectors: Label Function...
  • Page 30 E P I C B o a r d E P I C - B T 0 7 CN26 Mini-Card Slot CN27 Mini-Card / mSATA Slot CN29 Touch Screen Connector CN30 PS/2 Keyboard Mouse Connector CN31 COM Port 6 CN32 COM Port 5 CN33 SPI Programming Port...

  • Page 31: Stereo Audio Right Channel (Cn1)

    E P I C B o a r d E P I C - B T 0 7 2.7.1 Stereo Audio Right Channel (CN1) Pin Name Signal T ype Signal Level 2.7.2 RTC Battery Connector (CN2) Pin Name Signal T ype Signal Level +3.3 V 3.3 V...

  • Page 32: Stereo Audio Left Channel (Cn7)

    E P I C B o a r d E P I C - B T 0 7 +VIN +12V +VIN +12V 2.7.4 Stereo Audio Left Channel (CN7) Pin Name Signal T ype Signal Level 2.7.5 2-Pin Power in Connector (CN8) Pin Name Signal T ype Signal Level...
  • Page 33 E P I C B o a r d E P I C - B T 0 7 C/BE0# AD07 AD06 AD09 AD08 AD11 VI/O AD10 M66EN AD14 AD13 AD12 +3.3V C/BE1# AD15 +3.3V SERR# PSON# PERR# +3.3V PME# STOP# +3.3V LOCK# +3.3V...

  • Page 34: Audio Connector (Cn10)

    E P I C B o a r d E P I C - B T 0 7 INTD# RST# +12V INTA# INTB# INTC# -12V REQ3# GNT3# 2.7.7 Audio Connector (CN10) MIC_L MIC_R GND_AUDIO LINE_L_IN LINE_R_IN GND_AUDIO LEFT_OUT GND_AUDIO RIGHT_OUT +5V_AUDIO Pin Name Signal Type...

  • Page 35: Lpt/Digital I/O Connector (Cn12)

    E P I C B o a r d E P I C - B T 0 7 2.7.8 LPT/ Digital I/O Connector (CN12) LPT Mode Pin Name Signal Type Signal Level STOBE# #AFD PPD0 ERR# PPD1 PINIT# PPD2 SLIN# PPD3 PPD4 PPD5...
  • Page 36 E P I C B o a r d E P I C - B T 0 7 BUSY SLCT Digital I/O Mode Pin Name Signal Type Signal Level GPIO15 +5 V GPIO14 +5 V GPIO0 +5 V GPIO13 +5 V GPIO1 +5 V GPIO12...

  • Page 37: Usb 2.0 Port 2 (Cn13)

    E P I C B o a r d E P I C - B T 0 7 GPIO6 +5 V GPIO7 +5 V GPIO10 +5 V GPIO9 +5 V GPIO8 +5 V 2.7.9 USB 2.0 Port 2 (CN13) Pin Name Signal Type Signal Level +5VSB...

  • Page 38: Usb 2.0 Port 3 (Cn14)

    E P I C B o a r d E P I C - B T 0 7 2.7.10 USB 2.0 Port 3 (CN14) Pin Name Signal Type Signal Level +5VSB USB3_D- DIFF USB3_D+ DIFF 2.7.11 USB 2.0 Port 5 (CN15) Pin Name Signal Type Signal Level...

  • Page 39: Usb 2.0 Port 4 (Cn16)

    E P I C B o a r d E P I C - B T 0 7 2.7.12 USB 2.0 Port 4 (CN16) Pin Name Signal Type Signal Level +5VSB USB4_D- DIFF USB4_D+ DIFF 2.7.13 LVDS/eDP Inverter / Backlight Connector (CN19) BLK_PWR BKL_CONTROL BKL_ENABLE...

  • Page 40: Microsd Card Connector (Cn20)

    E P I C B o a r d E P I C - B T 0 7 BKL_ENABLE +3.3V 2.7.14 MicroSD Card Connector (CN20) Pin Name Signal Type Signal Level SDIO_D2 SDIO_D3 SDIO_CMD +3.3V +3.3V SDIO_CLK SDIO_D0 SDIO_D1 SDIO_CD# 2.7.15 LPC Expansion Connector (CN21) 2-24 Chapter 2 Quick Installation Guide...

  • Page 41: Uim Socket (Cn22)

    E P I C B o a r d E P I C - B T 0 7 Pin Name Signal Type Signal Level LAD0 +3.3V LAD1 +3.3V LAD2 +3.3V LAD3 +3.3V +3.3V +3.3V LFRAME# LRESET# +3.3V LCLK SERIRQ +3.3V 2.7.16 UIM Socket (CN22) Pin Name Signal Type...

  • Page 42: Output For Sata Hdd (Cn23)

    E P I C B o a r d E P I C - B T 0 7 UIM_DATA 2.7.17 +5V Output for SATA HDD (CN23) Pin Name Signal type Signal Level +5 V 2.7.18 SATA Port1 (CN25) Pin 1 Pin 7 Pin Name Signal Type...

  • Page 43: Minicard Slot (Cn26)

    E P I C B o a r d E P I C - B T 0 7 2.7.19 MiniCard Slot (CN26) Pin Name Signal Type Signal Level PCIE_WAKE# +3.3VSB +3.3V +1.5V +1.5V PCIE_CLK_REQ# UIM_PWR UIM_DAT PCIE_REF_CLK- DIFF UIM_CLK PCIE_REF_CLK+ DIFF UIM_RST UIM_VPP...
  • Page 44 E P I C B o a r d E P I C - B T 0 7 W_DISABLE# +3.3V PCIE_RST# +3.3V PCIE_RX- DIFF +3.3VSB +3.3V PCIE_RX+ DIFF +1.5V +1.5V SMB_CLK +3.3V PCIE_TX- DIFF SMB_DATA +3.3V PCIE_TX+ DIFF USB_D- DIFF USB_D+ DIFF 2-28...

  • Page 45: Minicard/ Msata Slot (Cn27)

    E P I C B o a r d E P I C - B T 0 7 +3.3VSB +3.3V +3.3VSB +3.3V +1.5V +1.5V +3.3VSB +3.3V 2.7.20 MiniCard/ mSATA Slot (CN27) Pin Name Signal Type Signal Level PCIE_WAKE# +3.3VSB +3.3V 2-29 Chapter 2 Quick Installation Guide...
  • Page 46 E P I C B o a r d E P I C - B T 0 7 +1.5V +1.5V PCIE_CLK_REQ# PCIE_REF_CLK- DIFF PCIE_REF_CLK+ DIFF W_DISABLE# +3.3V PCIE_RST# +3.3V SATA_RX+ DIFF +3.3V +3.3V 2-30 Chapter 2 Quick Installation Guide...
  • Page 47 E P I C B o a r d E P I C - B T 0 7 SATA_RX- DIFF +1.5V +1.5V SMB_CLK +3.3V SATA_TX- DIFF SMB_DATA +3.3V SATA_TX+ DIFF USB_D- DIFF USB_D+ DIFF +3.3V +3.3V +3.3V +3.3V 2-31 Chapter 2 Quick Installation Guide...

  • Page 48: Touchscreen Connector (Cn29)

    E P I C B o a r d E P I C - B T 0 7 +1.5V +1.5V +3.3V +3.3V Note: CN27 can be selected for MiniCard or mSATA by changing BOM 2.7.21 Touchscreen Connector (CN29) 8 Wires 4 Wires TOP EXCITE BOTTOM...
  • Page 49 E P I C B o a r d E P I C - B T 0 7 LEFT EXCITE RIGHT EXCITE TOP SENSE BOTTOM SENSE LEFT SENSE RIGHT SENSE 8 Wires 4 Wires 5 Wires UL(Y) BOTTOM UR(H) LEFT LL(L) RIGHT LR(X)
  • Page 50 E P I C B o a r d E P I C - B T 0 7 8 Wires 4 Wires 5 Wires TOP EXCITE UL(Y) BOTTOM UR(H) BOTTOM EXCITE LEFT EXCITE LEFT LL(L) RIGHT EXCITE RIGHT LR(X) TOP SENSE SENSE(S) BOTTOM SENSE LEFT SENSE...

  • Page 51: Ps/@ Keyboard Mouse Connector (Cn30)

    E P I C B o a r d E P I C - B T 0 7 2.7.22 PS/2 Keyboard Mouse Connector (CN30) Pin Name Signal Type Signal Level KB_ DATA KB_CLK +5VSB MS_DATA MS_CLK 2.7.23 COM Port 6 (CN31) Pin Name Signal Type Signal Level...

  • Page 52: Com Port 5 (Cn32)

    E P I C B o a r d E P I C - B T 0 7 ±9V ±9V ±9V 2.7.24 COM Port 5 (CN32) Pin Name Signal Type Signal Level ±9V ±9V ±9V 2-36 Chapter 2 Quick Installation Guide...

  • Page 53: Spi Programming Port (Cn33)

    E P I C B o a r d E P I C - B T 0 7 2.7.25 SPI Programming Port (CN33) Pin Name Signal Type Signal Level SPI_MISO SPI_CLK +3.3VSB +3.3V SPI_MOSI SPI_CS 2.7.26 LVDS Port 1/ eDP (CN35) PIN 29 PIN 30 PIN 1...
  • Page 54 E P I C B o a r d E P I C - B T 0 7 The max driving current is 2 A LVDS Pin Name Signal Type Signal Level BKL_ENABLE BKL_CONTROL LCD_PWR +3.3V/+5V LVDS_A_CLK- DIFF LVDS_A_CLK+ DIFF LCD_PWR +3.3V/+5V LVDS_DA0-...
  • Page 55 E P I C B o a r d E P I C - B T 0 7 LVDS_DB0- DIFF LVDS_DB0+ DIFF LVDS_DB1- DIFF LVDS_DB1+ DIFF LVDS_DB2- DIFF LVDS_DB2+ DIFF LVDS_DB3- DIFF LVDS_DB3+ DIFF LCD_PWR +3.3V/+5V LVDS_B_CLK- DIFF LVDS_B_CLK+ DIFF Pin Name Signal Type Signal Level...
  • Page 56 E P I C B o a r d E P I C - B T 0 7 eDP_DA3+ DIFF LCD_PWR +3.3V/+5V eDP_DA2- DIFF eDP_DA2+ DIFF eDP_DA1- DIFF eDP_DA1+ DIFF eDP_DA0- DIFF eDP_DA0+ DIFF Hot Plug Detect # eDP_AUX- DIFF eDP_AUX+ DIFF 2-40...

  • Page 57: Com Port 4 (Cn37)

    E P I C B o a r d E P I C - B T 0 7 LCD_PWR +3.3V/+5V Remark: eDP may not work on DDI0. Pre-testing eDP first is recommended 2.7.27 COM Port 4 (CN37) Pin Name Signal Type Signal Level ±9V ±9V...

  • Page 58: Com Port 3 (Cn38)

    E P I C B o a r d E P I C - B T 0 7 2.7.28 COM Port 3 (CN38) RI/+5V/+12V RS-232 Pin Name Signal Type Signal Level ±6V ±6V ±6V RI/+5V/+12V IN/ PWR +5V/+12V 2-42 Chapter 2 Quick Installation Guide...
  • Page 59 E P I C B o a r d E P I C - B T 0 7 RS422_TX- RS422_TX+ RS422_RX+ RS422_RX- NC/+5V/+12V RS-422 Pin Name Signal Type Signal Level RS422_TX- ±5V RS422_TX+ ±5V RS422_RX+ RS422_RX- NC/+5V/+12V +5V/+12V 2-43 Chapter 2 Quick Installation Guide...
  • Page 60 E P I C B o a r d E P I C - B T 0 7 RS485_D- RS485_D+ NC/+5V/+12V RS-485 Pin Name Signal Type Signal Level RS485_D- ±5V RS485_D+ ±5V NC/+5V/+12V +5V/+12V COM3 RS-232/422/485 can be set by BIOS settings. Default is RS-232 Function for Pin 8 can be set by CN36 2-44 Chapter 2 Quick Installation Guide...

  • Page 61: Front Panel Connector (Cn39)

    E P I C B o a r d E P I C - B T 0 7 2.7.29 Front Panel Connector (CN39) Pin Name Signal Type Signal Level PWR_BTN# FP_SPKR +3.3V +3.3V HDD_LED# +3.3V +3.3V HWRST# 2.7.30 10M/100M/1G Ethernet Port 1 (CN44) ACT/LINK SPEED 2-45...

  • Page 62: 100M/1G Ethernet Port 2 (Cn45)

    E P I C B o a r d E P I C - B T 0 7 Pin Name Signal Type Signal Level MDI0+ DIFF MDI0- DIFF MDI1+ DIFF MDI2+ DIFF MDI2- DIFF MDI1- DIFF MDI3+ DIFF MDI3- DIFF 2.7.31 10M/100M/1G Ethernet Port 2 (CN45) ACT/LINK SPEED...

  • Page 63: Usb Port 0 & 1 (Cn47)

    E P I C B o a r d E P I C - B T 0 7 MDI1- DIFF MDI3+ DIFF MDI3- DIFF 2.7.32 USB Port 0 & 1 (CN47) Pin Name Signal Type Signal Level +5VSB +5 V USB0_D- DIFF USB0_D+...

  • Page 64: Dp Port (Cn48)

    E P I C B o a r d E P I C - B T 0 7 Only Port0 supports USB 3.0 2.7.33 DP Port (CN48) Pin Name Signal Type Signal Level DP_D0+ DIFF DP_D0- DIFF DP_D1+ DIFF DP_D1- DIFF DP_D2+ DIFF...

  • Page 65: Com Port 1 & 2 (Cn49)

    E P I C B o a r d E P I C - B T 0 7 DP_AUX+ DIFF DP_AUX- DIFF HPLG_DETECT +3.3V +3.3 V 2.7.34 COM Port 1 & 2 (CN49) * COM2 RS-232/422/485 can be set by BIOS setting. Default is RS-232 * Function for Pin 9 can be set by CN34 COM1 (RS-232) Pin Name...
  • Page 66 E P I C B o a r d E P I C - B T 0 7 ±9 V COM2 (RS-232) Pin Name Signal Type Signal Level ±9 V ±9 V ±9 V RI/+5V/+12V IN/PWR +5 V/ +12 V COM2 (RS-422) Pin Name Signal Type...

  • Page 67: Hdmi Port (Cn50)

    E P I C B o a r d E P I C - B T 0 7 NC/+5V/+12V +5 V/ +12 V COM2 (RS-485) Pin Name Signal Type Signal Level RS485_D- ±5 V RS485_D+ ±5 V NC/+5V/+12V +5V/ +12V 2.7.35 HDMI Port (CN50) Pin Name Signal Type...
  • Page 68 E P I C B o a r d E P I C - B T 0 7 TMDS_DAT2- DIFF TMDS_DAT1+ DIFF TMDS_DAT1- DIFF TMDS_DAT0+ DIFF TMDS_DAT0- DIFF TMDS_CLK+ DIFF TMDS_CLK- DIFF DDC_CLK DDC_DATA HPLG_DETECT 2-52 Chapter 2 Quick Installation Guide...

  • Page 69: Vga Port (Cn51)

    E P I C B o a r d E P I C - B T 0 7 2.7.36 VGA Port (CN51) Pin Name Signal Type Signal Level GREEN BLUE RED_GND_RTN GREEN_GND_RTN BLUE_GND_RTN CRT_PLUG# DDC_DATA HSYNC VSYNC DDC_CLK 2-53 Chapter 2 Quick Installation Guide...

  • Page 70: Smbus Connector (Cn52)

    E P I C B o a r d E P I C - B T 0 7 2.7.37 SMBus Connector (CN52) Pin Name Signal Type Signal Level SMB_DATA SMB_CLK 2.7.38 DDR3L SODIMM (DIMM1) Standard Specification 2-54 Chapter 2 Quick Installation Guide...
  • Page 71 E P I C B o a r d E P I C - B T 0 7 Chapter BIOS Setup Chapter 3 AMI BIOS Setup 3-1...

  • Page 72: System Test And Initialization

    4. The CMOS memory has lost power and the configuration information has been erased. The EPIC-BT07 CMOS memory has an integral lithium battery backup for data retention. However, you will need to replace the complete unit when it finally runs down.

  • Page 73: Ami Bios Setup

    E P I C B o a r d E P I C - B T 0 7 3.2 AMI BIOS Setup AMI BIOS ROM has a built-in Setup program that allows users to modify the basic system configuration. This type of information is stored in battery-backed CMOS RAM and BIOS NVRAM so that it retains the Setup information when the power is turned off.
  • Page 74 E P I C B o a r d E P I C - B T 0 7 Setup Menu Setup submenu: Main Chapter 3 AMI BIOS Setup 3-4...
  • Page 75 E P I C B o a r d E P I C - B T 0 7 Setup submenu: Advanced Chapter 3 AMI BIOS Setup 3-5...
  • Page 76 E P I C B o a r d E P I C - B T 0 7 CPU Configuration Options summary: Intel Virtualization Disabled Technology Enabled Optimal Default, Failsafe Default Enable or Disable Intel Virtualization Technology EIST Disabled Enabled Optimal Default, Failsafe Default Enable or Disable EIST Chapter 3 AMI BIOS Setup 3-6...
  • Page 77 E P I C B o a r d E P I C - B T 0 7 IDE Configuration (IDE) Options summary: SATA Mode IDE Mode AHCI Mode Optimal Default, Failsafe Default Chapter 3 AMI BIOS Setup 3-7...
  • Page 78 E P I C B o a r d E P I C - B T 0 7 USB Configuration Options summary: Legacy USB Support Enabled Optimal Default, Failsafe Default Disabled Auto Enables BIOS Support for Legacy USB Support. When enabled, USB can be functional in legacy environment like DOS.
  • Page 79 E P I C B o a r d E P I C - B T 0 7 Hardware Monitor Chapter 3 AMI BIOS Setup 3-9...
  • Page 80 E P I C B o a r d E P I C - B T 0 7 Dynamic Digital IO Options summary: Digital GPIO [3:0] Input Optimal Default, Failsafe Default Direction Output Set GPIO as Input or Output Digital GPIO [7:4] Input Direction Optimal Default, Failsafe Default...
  • Page 81 E P I C B o a r d E P I C - B T 0 7 Digital GPIO [15:12] Input Direction Output Optimal Default, Failsafe Default Set GPIO as Input or Output Output Level Optimal Default, Failsafe Default Chapter 3 AMI BIOS Setup 3-11...
  • Page 82 E P I C B o a r d E P I C - B T 0 7 Power Management Options summary: Power Mode ATX Type Optimal Default, Failsafe Default AT Type Select power supply mode. AC Power Loss Last State Optimal Default, Failsafe Default Power On Power Off...
  • Page 83 E P I C B o a r d E P I C - B T 0 7 Trusted Computing Options summary: Security Device Disable Optimal Default, Failsafe Default Support Enable Enable or Disable BIOS support for security device. Chapter 3 AMI BIOS Setup 3-13...
  • Page 84 E P I C B o a r d E P I C - B T 0 7 SIO Configuration Chapter 3 AMI BIOS Setup 3-14...
  • Page 85 E P I C B o a r d E P I C - B T 0 7 Serial Port 1 Configuration Options summary: Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=3F8;...
  • Page 86 E P I C B o a r d E P I C - B T 0 7 Serial Port 2 Configuration Options summary: Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2F8;...
  • Page 87 E P I C B o a r d E P I C - B T 0 7 Serial Port 3 Configuration Options summary: Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=3E8;...
  • Page 88 E P I C B o a r d E P I C - B T 0 7 Serial Port 4 Configuration Options summary: Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2E8;...
  • Page 89 E P I C B o a r d E P I C - B T 0 7 Serial Port 5 Configuration Options summary: Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2D0;...
  • Page 90 E P I C B o a r d E P I C - B T 0 7 Serial Port 6 Configuration Options summary: Use This Device Disabled Enabled Optimal Default, Failsafe Default En/Disable Serial Port (COM) Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2C0;...
  • Page 91 E P I C B o a r d E P I C - B T 0 7 Parallel Port Configuration Options summary: Use This Device Disabled Optimal Default, Failsafe Default Enabled En/Disable Parallel Port Chapter 3 AMI BIOS Setup 3-21...
  • Page 92 E P I C B o a r d E P I C - B T 0 7 Setup submenu: Chipset Chapter 3 AMI BIOS Setup 3-22...
  • Page 93 E P I C B o a r d E P I C - B T 0 7 North Bridge Chapter 3 AMI BIOS Setup 3-23...
  • Page 94 E P I C B o a r d E P I C - B T 0 7 Display Control Configuration Options summary: DVMT Pre-Allocated Optimal Default, Failsafe Default 128M 160M 192M 224M 256M 288M 320M 352M 384M 416M 448M 480M 512M DVMT Total Gfx Mem...
  • Page 95 E P I C B o a r d E P I C - B T 0 7 DVMT Total Gfx Mem 128MB 256MB Optimal Default, Failsafe Default LVDS Enable Optimal Default, Failsafe Default Disable LVDS Panel Type 640x480, 60Hz 800x480, 60Hz 800x600,60Hz 1024x600,60Hz...
  • Page 96 E P I C B o a r d E P I C - B T 0 7 South Bridge Options summary: Audio Controller Disabled Enabled Optimal Default, Failsafe Default Chapter 3 AMI BIOS Setup 3-26...
  • Page 97 E P I C B o a r d E P I C - B T 0 7 Security Change User/Supervisor Password You can install a Supervisor password, and if you install a supervisor password, you can then install a user password. A user password does not provide access to many of the features in the Setup utility.
  • Page 98 E P I C B o a r d E P I C - B T 0 7 Setup submenu: Boot Options summary: Quiet Boot Disabled Enabled Default En/Disable showing boot logo. Option ROM Messages Force BIOS Default Keep Current Set display mode for Option ROM Launch PXE OpROM Disabled...
  • Page 99 E P I C B o a r d E P I C - B T 0 7 BBS Priorities Chapter 3 AMI BIOS Setup 3-29...
  • Page 100 E P I C B o a r d E P I C - B T 0 7 Setup submenu: Exit Chapter 3 AMI BIOS Setup 3-30...

  • Page 101: Chapter 4 Driver Installation

    E P I C B o a r d E P I C - B T 0 7 Chapter Driver Installation 4 - 1 Chapter 4 Driver Installation...
  • Page 102 E P I C B o a r d E P I C - B T 0 7 The EPIC-BT07 comes with a driver disk that contains all drivers and utilities you need to setup your product. Insert the disk and the installation guide will start automatically. If it doesn’t, please follow the sequence below to install the drivers.
  • Page 103 E P I C B o a r d E P I C - B T 0 7 4.1 Installation Insert the EPIC-BT07 driver disk into the disk drive and install the drivers from Step 1 to Step 10 in order. Step 1 – Install Chipset Driver 1.
  • Page 104 E P I C B o a r d E P I C - B T 0 7 Step 4 – Install xHCI Driver (Windows 7 only) 1. Open the Step 4 - xHCI folder followed by Setup.exe 2. Follow the instructions 3.
  • Page 105 E P I C B o a r d E P I C - B T 0 7 Step 8 – Install Touch Driver 1. Open the Step 8 – Touch folder followed by Setup.exe 2. Follow the instructions 3. Drivers will be installed automatically Step 9 –...
  • Page 106 E P I C B o a r d E P I C - B T 0 7 2. Reboot and log in as administrator 4 - 6 Chapter 4 Driver Installation...
  • Page 107 E P I C B o a r d E P I C - B T 0 7 3. Run patch.bat as administrator Step 10 – Install Atom E3800 IO Driver 1. Open the Step 10 – Atom_E3800_IO folder and select your OS 2.

  • Page 108: Appendix A Programming The Watchdog Timer

    E P I C B o a r d E P I C - B T 0 7 Appendix Programming the Watchdog Timer Appendix A Programming the Watchdog Timer A-1...

  • Page 109: Watchdog Timer Initial Program

    E P I C B o a r d E P I C - B T 0 7 A.1 Watchdog Timer Initial Program Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E (Note1) 0x2E or 0x4E...
  • Page 110 E P I C B o a r d E P I C - B T 0 7 ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value);...
  • Page 111 E P I C B o a r d E P I C - B T 0 7 ************************************************************************************ Main VOID // Procedure : AaeonWDTConfig // (byte)Timer : Time of WDT timer.(0x00~0xFF) // (boolean)Unit : Select time unit(0: second, 1: minute). AaeonWDTConfig();...
  • Page 112 E P I C B o a r d E P I C - B T 0 7 ************************************************************************************ // Procedure : AaeonWDTEnable AaeonWDTEnable () VOID WDTEnableDisable( EnableLDN, EnableReg, EnableBit, 1 // Procedure : AaeonWDTConfig AaeonWDTConfig () VOID // Disable WDT counting WDTEnableDisable( EnableLDN, EnableReg, EnableBit, 0 // Clear Watchdog Timeout Status...
  • Page 113 E P I C B o a r d E P I C - B T 0 7 ************************************************************************************ SIOEnterMBPnPMode() VOID IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x87); SIOExitMBPnPMode() VOID IOWriteByte(SIOIndex, 0xAA); SIOSelectLDN(byte LDN) VOID IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value) VOID...

  • Page 114: Appendix B I/O Information

    E P I C B o a r d E P I C - B T 0 7 Appendix I/O Information Appendix B I/O Information...

  • Page 115: I/O Address Map

    E P I C B o a r d E P I C - B T 0 7 B.1 I/O Address Map Appendix B I/O Information...
  • Page 116 E P I C B o a r d E P I C - B T 0 7 Appendix B I/O Information...

  • Page 117: Memory Address Map

    E P I C B o a r d E P I C - B T 0 7 B.2 Memory Address Map B.3 IRQ Mapping Chart Appendix B I/O Information...
  • Page 118 E P I C B o a r d E P I C - B T 0 7 Appendix B I/O Information...
  • Page 119 E P I C B o a r d E P I C - B T 0 7 Appendix B I/O Information...
  • Page 120 E P I C B o a r d E P I C - B T 0 7 Appendix B I/O Information...
  • Page 121 E P I C B o a r d E P I C - B T 0 7 Appendix B I/O Information...
  • Page 122 E P I C B o a r d E P I C - B T 0 7 Appendix B I/O Information...
  • Page 123 E P I C B o a r d E P I C - B T 0 7 B-10 Appendix B I/O Information...
  • Page 124 E P I C B o a r d E P I C - B T 0 7 B-11 Appendix B I/O Information...
  • Page 125 E P I C B o a r d E P I C - B T 0 7 B-12 Appendix B I/O Information...
  • Page 126 E P I C B o a r d E P I C - B T 0 7 B-13 Appendix B I/O Information...

  • Page 127: Appendix C Mating Connectors

    E P I C B o a r d E P I C - B T 0 7 Appendix Mating Connectors C - 1 Appendix C Mating Connector...

  • Page 128: List Of Mating Connectors And Cables

    E P I C B o a r d E P I C - B T 0 7 C.1 List of Mating Connectors and Cables The table notes mating connectors and available cables. Mating Connector Connector Available Cable P/N Function Label Cable Vendor...
  • Page 129 E P I C - B T 0 7 USB 2.0 Port CN15 PINREX 712-71-05TW01 Wafer 1700050207 Cable USB 2.0 Port CN16 PINREX 712-71-05TW01 Wafer 1700050207 Cable AAEON CN21 Expansion PINREX 710-73-12TW01 1703120130 LPC Cable Connector +5V Output 2 Pins For CN23 for SATA PINREX 721-81-02TW00 SATA...
  • Page 130 E P I C B o a r d E P I C - B T 0 7 UART CN38 COM Port 3 PINREX 712-71-09TW01 Wafer 1701090150 Cable C - 4 Appendix C Mating Connector...

  • Page 131: Appendix D Electrical Specifications For I/O Ports

    E P I C B o a r d E P I C - B T 0 7 Appendix Electrical Specifications for I/O Ports Appendix D Electrical Specifications for I/O Ports...

  • Page 132: Electrical Specifications For I/O Ports

    E P I C B o a r d E P I C - B T 0 7 D.1 Electrical Specifications for I/O Ports Reference Signal Name Rate output Audio I/O Port CN10 +5V/1A Digital IO Port CN12 +5V/1A USB 2.0 Port 2 CN13 +5VSB +5V/0.5A...
  • Page 133 E P I C B o a r d E P I C - B T 0 7 DP Port CN48 +3.3V +3.3V/1A +5V/1A or COM Port 2 CN49 +5V/+12V +12V/1A HDMI Port CN50 +5V/1A VGA Port CN51 +5V/1A (reserved) Appendix D Electrical Specifications for I/O Ports...

  • Page 134: Appendix E Digital I/O Ports

    E P I C B o a r d E P I C - B T 0 7 Appendix Digital I/O Ports Appendix D Electrical Specifications for I/O Ports...
  • Page 135 E P I C B o a r d E P I C - B T 0 7 E.1 DIO Programming EPIC-BT07 utilizes FINTEK 81866 chipset as its Digital I/O controller. Below are the procedures to complete its configuration and the AAEON initial watchdog timer program is also attached based on which you can develop customized program to fit your application.

  • Page 136: Digital I/O Register

    E P I C B o a r d E P I C - B T 0 7 E.2 Digital I/O Register Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E (Note1) 0x2E or 0x4E SIO MB PnP Mode Data Register...
  • Page 137 E P I C B o a r d E P I C - B T 0 7 Table 4 : Digital Input relative register table Register BitNum Value Note DIO-8 Pin Status 0x06 0x8A GPIO70 (Note59) (Note60) (Note61) DIO-9 Pin Status 0x06 0x8A GPIO71...

  • Page 138: Digital I/O Sample Program

    E P I C B o a r d E P I C - B T 0 7 E.3 Digital I/O Sample Program ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value);...
  • Page 139 E P I C B o a r d E P I C - B T 0 7 ************************************************************************************ // Digital Output control relative definition (Please reference to Table 3) #define byte DOutput1LDN // This parameter is represented from Note27 #define byte DOutput1Reg // This parameter is represented from Note28 #define byte DOutput1Bit // This parameter is represented from Note29 #define byte DOutput1Val // This parameter is represented from Note30...
  • Page 140 E P I C B o a r d E P I C - B T 0 7 ************************************************************************************ // Digital Input Status relative definition (Please reference to Table 4) #define byte DInput9LDN // This parameter is represented from Note59 #define byte DInput9Reg // This parameter is represented from Note60 #define byte DInput9Bit // This parameter is represented from Note61 #define byte DInput10LDN // This parameter is represented from Note62...
  • Page 141 E P I C B o a r d E P I C - B T 0 7 ************************************************************************************ // Digital Output control relative definition (Please reference to Table 5) #define byte DOutput9LDN // This parameter is represented from Note83 #define byte DOutput9Reg // This parameter is represented from Note84 #define byte DOutput9Bit // This parameter is represented from Note85 #define byte DOutput9Val // This parameter is represented from Note86...
  • Page 142 E P I C B o a r d E P I C - B T 0 7 ************************************************************************************ Main VOID Boolean PinStatus ; // Procedure : AaeonReadPinStatus // Input : Example, Read Digital I/O Pin 3 status // Output : InputStatus : 0: Digital I/O Pin level is low 1: Digital I/O Pin level is High...
  • Page 143 E P I C B o a r d E P I C - B T 0 7 ************************************************************************************ AaeonReadPinStatus(byte LDN, byte Register, byte BitNum) Boolean Boolean PinStatus ; PinStatus = SIOBitRead(LDN, Register, BitNum); Return PinStatus ; AaeonSetOutputLevel(byte LDN, byte Register, byte BitNum, byte Value) VOID ConfigToOutputMode(LDN, Register, BitNum);...
  • Page 144 E P I C B o a r d E P I C - B T 0 7 ************************************************************************************ SIOEnterMBPnPMode() VOID IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x87); SIOExitMBPnPMode() VOID IOWriteByte(SIOIndex, 0xAA); SIOSelectLDN(byte LDN) VOID IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value) VOID...
  • Page 145 E P I C B o a r d E P I C - B T 0 7 ************************************************************************************ SIOBitRead(byte LDN, byte Register, byte BitNum) Boolean Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(LDN); IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData); TmpValue &= (1 << BitNum); SIOExitMBPnPMode();...

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