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Aaeon EPIC-BDU7 User Manual

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E P I C B o a r d
E P I C - B D U 7
EPIC-BDU7
®
Intel
Core™ i3/i5/i7 ULT Processor SoC
DDR3L 1600 SODIMM
2 Mini-PCIe Socket
4 USB 2.0, 2 USB 3.0, 6 COM
2 SATA, 1 mSATA
VGA, LVDS, DP
nd
EPIC-BDU7 Rev. A Manual 2
Ed.
August 27, 2015

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Summary of Contents for Aaeon EPIC-BDU7

  • Page 1 E P I C - B D U 7 EPIC-BDU7 ® Intel Core™ i3/i5/i7 ULT Processor SoC DDR3L 1600 SODIMM 2 Mini-PCIe Socket 4 USB 2.0, 2 USB 3.0, 6 COM 2 SATA, 1 mSATA VGA, LVDS, DP EPIC-BDU7 Rev. A Manual 2 August 27, 2015...
  • Page 2 E P I C B o a r d E P I C - B D U 7 Copyright Notice This document is copyrighted, 2015. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice.
  • Page 3 E P I C B o a r d E P I C - B D U 7 Acknowledgments All other products’ name or trademarks are properties of their respective owners. ® is trademark of Advanced Micro Devices.  ® Microsoft Windows is a registered trademark of Microsoft Corp.
  • Page 4 Before you begin installing your card, please make sure that the following materials have been shipped: • DVD-ROM for manual (in PDF format) and drivers • EPIC-BDU7 If any of these items are missing or damaged, please contact your distributor or sales representative immediately.
  • Page 5 E P I C B o a r d E P I C - B D U 7 China RoHS Requirements 产品中有毒有害物质或元素名称及含量 AAEON Main Board/ Daughter Board/ Backplane 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI))
  • Page 6 E P I C B o a r d E P I C - B D U 7 China RoHS Requirements Poisonous or Hazardous Substances or Elements in Products AAEON Main Board/ Daughter Board/ Backplane Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated...

  • Page 7: Table Of Contents

    E P I C B o a r d E P I C - B D U 7 Contents Chapter 1 General Information 1.1 Introduction ..............1-2 1.2 Features ................1-3 1.3 Specifications ..............1-4 Chapter 2 Quick Installation Guide 2.1 Safety Precautions ............2-2 2.2 Dimensions ..............2-3 2.3 Jumpers and Connectors ..........2-5 2.4 List of Jumpers ..............2-6...
  • Page 8 E P I C B o a r d E P I C - B D U 7 2.15 COM3 (Wafer) Ring/+12V/+5V Selection (JP14) ..2-12 2.16 LVDS Port2 Backlight Lightness Control Mode Selection (JP15) ................2-12 2.17 LVDS Port2 Backlight Inverter Voltage Selection (JP17) ...................2-12 2.18 LVDS Port2 Operating Voltage Selection (JP18) ..2-12 2.19 Stereo Audio Right Channel (CN1) ......2-13...
  • Page 9 E P I C B o a r d E P I C - B D U 7 2.38 COM Port 6 (CN21) ...........2-31 2.39 COM Port 5 (CN22) ...........2-31 2.40 COM Port 1 (Optional) (CN23) ........2-32 2.41 LVDS Port 1/eDP Inverter / Backlight Connector (CN24) ...................2-33 2.42 LVDS Port 1/eDP (CN25) ..........2-34 2.43 10M/100M/1G Ethernet Port 1 (CN26)......2-37...
  • Page 10 E P I C B o a r d E P I C - B D U 7 Chapter 4 Driver Installation 4.1 Installation ..............4-3 Appendix A Programming The Watchdog Timer A.1 Programming ............A-2 A.2 WatchDog Sample Program ........A-3 Appendix B I/O Information B.1 I/O Address Map ............

  • Page 11: Chapter 1 General Information

    E P I C B o a r d E P I C - B D U 7 Chapter General Information 1- 1 Chapter 1 General Information...

  • Page 12: Introduction

    E P I C B o a r d E P I C - B D U 7 1.1 Introduction As one of AAEON’s first products using Intel® 5 Generation Core™ Processor SoCs, the board is equipped with rich media playing features such as support for 4K resolution videos as well as independent displays.

  • Page 13: Features

    E P I C B o a r d E P I C - B D U 7 1.2 Features Fifth Generation Intel® Core™ i3/i5/i7 ULT Processor SoC  DDR3L 1600 SODIMM, up to 8GB  VGA, LVDS1, DP, LVDS2 (Optional), eDP (Optional) ...

  • Page 14: Specifications

    Intel® WGI211AT x 1/ WGI218LM x 1 Ethernet  AMI BIOS BIOS  Wake On LAN  1~255 sec support by AAEON Hi-Safe Watchdog Timer  Supported by AAEON Hi-Safe H/W Status Monitoring  Full-size MiniCard #1 (Shared with mSATA) Expansion Interface ...
  • Page 15 E P I C B o a r d E P I C - B D U 7 Lithium RTC battery Battery  DC 9~24V, AT/ATX Power Requirement  Power Consumption  (Typical) Board Size 165mm x 115mm (6.5" x 4.53") ...
  • Page 16 E P I C B o a r d E P I C - B D U 7 default) USB 3.0 x 2  USB 2.0 x 4 RS-232 x 4 Serial Port  RS-232/422/485 x 2 (Ring/+5V/+12V) SPP/EPP/ECP x 1 (Optional) controlled by Parallel Port ...

  • Page 17: Chapter 2 Quick Installation Guide

    E P I C B o a r d E P I C - B D U 7 Chapter Quick Installation Guide Chapter 2 Quick Installation Guide...

  • Page 18: Safety Precautions

    E P I C B o a r d E P I C - B D U 7 2.1 Safety Precautions Always completely disconnect the power cord from your board whenever you are working on it. Do not make connections while the power is on, because a sudden rush of power can damage sensitive electronic components.

  • Page 19: Dimensions

    E P I C B o a r d E P I C - B D U 7 2.2 Dimensions Component Side Component Side Component Side Chapter 2 Quick Installation Guide...
  • Page 20 E P I C B o a r d E P I C - B D U 7 With Heat Spreader Chapter 2 Quick Installation Guide...
  • Page 21 E P I C B o a r d E P I C - B D U 7 Solder Side With Heat Spreader Solder Side Chapter 2 Quick Installation Guide...

  • Page 22: Jumpers And Connectors

    E P I C B o a r d E P I C - B D U 7 2.3 Jumpers and Connectors Component Side Component Side Chapter 2 Quick Installation Guide...

  • Page 23: List Of Jumpers

    E P I C B o a r d E P I C - B D U 7 2.4 List of Jumpers The board has a number of jumpers that allow you to configure your system to suit your application. The table below shows the function of each of the board's jumpers: Label Function...

  • Page 24: List Of Connectors

    E P I C B o a r d E P I C - B D U 7 2.5 List of Connectors The board has a number of connectors that allow you to configure your system to suit your application. The table below shows the function of each board's connectors: Label Function...
  • Page 25 E P I C B o a r d E P I C - B D U 7 CN21 COM Port 6 (RS232) CN22 COM Port 5 (RS232) CN23 COM Port 1 (RS232) CN24 LVDS Port1/eDP Inverter / Backlight Connector CN25 LVDS Port1/eDP CN26...

  • Page 26: Setting Jumpers

    E P I C B o a r d E P I C - B D U 7 2.6 Setting Jumpers You configure your card to match the needs of your application by setting jumpers. A jumper is the simplest kind of electric switch. It consists of two metal pins and a small metal clip (often protected by a plastic cover) that slides over the pins to connect them.

  • Page 27: I/O Voltage Selection (Jp1)

    E P I C B o a r d E P I C - B D U 7 2.7 PCI-104 I/O Voltage Selection (JP1) 1 2 3 1 2 3 +3.3V (Default) 2.8 Clear CMOS Jumper (JP2) 1 2 3 1 2 3 Normal (Default) Clear CMOS...

  • Page 28: Lvds2 Port1/Edp Backlight Inverter Voltage Selection (Jp10)

    E P I C B o a r d E P I C - B D U 7 2.11 LVDS2 Port1/eDP Backlight Inverter Voltage Selection (JP10) 1 2 3 1 2 3 +12V +5V (Default) 2.12 LVDS2 Port1/eDP Operating Voltage Selection (JP11) 1 2 3 1 2 3 +3.3V (Default)

  • Page 29: Com3 (Wafer) Ring/+12V/+5V Selection (Jp14)

    E P I C B o a r d E P I C - B D U 7 2.15 COM3 (Wafer) Ring/+12V/+5V Selection (JP14) +12V Ring (Default) 2.16 LVDS Port2 Backlight Lightness Control Mode Selection (JP15) 1 2 3 1 2 3 VR Mode PWM Mode (Default) 2.17 LVDS Port2 Backlight Inverter Voltage Selection (JP17)

  • Page 30: Stereo Audio Right Channel (Cn1)

    E P I C B o a r d E P I C - B D U 7 2.19 Stereo Audio Right Channel (CN1) Pin Name Signal T ype Signal Level 2.20 Stereo Audio Left Channel (CN2) Pin Name Signal T ype Signal Level 2.21 Main Power Input (+12V) (CN3) Pin Name...

  • Page 31: Main Power Input (+9V To +24V) (Cn4)

    E P I C B o a r d E P I C - B D U 7 +VIN +12V 2.22 Main Power Input (+9V to +24V) (CN4) Pin Name Signal T ype Signal Level +VIN +9V to +24V 2.23 PCI-104 Connector (CN5) +5V_SB AD00 VI/O...
  • Page 32 E P I C B o a r d E P I C - B D U 7 STOP# +3.3V LOCK# +3.3V TRDY# DEVSEL# FRAME# IRDY# +3.3V AD16 +3.3V C/BE2# AD18 +3.3V AD17 AD21 AD20 AD19 +3.3V AD23 AD22 +3.3V IDSEL0 IDSEL1 IDSEL2...

  • Page 33: High Definition Audio (Cn6)

    E P I C B o a r d E P I C - B D U 7 2.24 High Definition Audio (CN6) MIC_L MIC_R GND_AUDIO LINE_L_IN LINE_R_IN GND_AUDIO LEFT_OUT GND_AUDIO RIGHT_OUT +5V_AUDIO Pin Name Signal Type Signal Level MIC_L MIC_R GND_AUDIO LINE_L_IN...

  • Page 34: Usb 2.0 Port 4 (Cn7)

    E P I C B o a r d E P I C - B D U 7 2.25 USB 2.0 Port 4 (CN7) Pin Name Signal Type Signal Level +5VSB USB3_D- DIFF USB3_D+ DIFF 2.26 Front Panel (CN8) Pin Name Signal Type Signal Level PWR_BTN#...

  • Page 35: Lpt/ Digital Io Port (Cn9)

    E P I C B o a r d E P I C - B D U 7 SPEAKER +V3.3S +3.3V HDD_LED# +V3.3S +3.3V H/W RESET# 2.27 LPT/ Digital IO Port (CN9) Pin Name Signal Type Signal Level STOBE# #AFD PPD0 ERR# PPD1...
  • Page 36 E P I C B o a r d E P I C - B D U 7 PPD3 PPD4 PPD5 PPD6 PPD7 ACK# BUSY SLCT Digital I/O Mode Pin Name Signal Type Signal Level GPIO15 GPIO14 2-20 Chapter 2 Quick Installation Guide...
  • Page 37 E P I C B o a r d E P I C - B D U 7 GPIO0 GPIO13 GPIO1 GPIO12 GPIO2 GPIO11 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO10 GPIO9 GPIO8 2-21 Chapter 2 Quick Installation Guide...

  • Page 38: Usb 2.0 Port 3 (Cn10)

    E P I C B o a r d E P I C - B D U 7 2.28 USB 2.0 Port 3 (CN10) Pin Name Signal Type Signal Level +5VSB USB2_D- DIFF USB2_D+ DIFF 2.29 USB 2.0 Port 5 (CN11) Pin Name Signal Type Signal Level...

  • Page 39: Minicard (Half-Size) (Cn12)

    E P I C B o a r d E P I C - B D U 7 2.30 MiniCard (Half-size) (CN12) Pin Name Signal Type Signal Level PCIE_WAKE# +3.3VSB +3.3V +1.5V +1.5V PCIE_CLK_REQ# PCIE_REF_CLK- DIFF PCIE_REF_CLK+ DIFF 2-23 Chapter 2 Quick Installation Guide...
  • Page 40 E P I C B o a r d E P I C - B D U 7 W_DISABLE# +3.3V PCIE_RST# +3.3V PCIE_RX- DIFF +3.3VSB +3.3V PCIE_RX+ DIFF +1.5V +1.5V SMB_CLK +3.3V PCIE_TX- DIFF SMB_DATA +3.3V PCIE_TX+ DIFF USB_D- DIFF USB_D+ DIFF 2-24...

  • Page 41: Output For Sata Hdd (Cn14)

    E P I C B o a r d E P I C - B D U 7 +3.3VSB +3.3V +3.3VSB +3.3V +1.5V +1.5V +3.3VSB +3.3V 2.31 +5V Output for SATA HDD (CN14) Pin Name Signal Type Signal Level 2-25 Chapter 2 Quick Installation Guide...

  • Page 42: Uim Socket (Cn15)

    E P I C B o a r d E P I C - B D U 7 2.32 UIM Socket (CN15) Pin Name Signal Type Signal Level UIM_PWR UIM_RST UIM_CLK UIM_VPP UIM_DAT 2.33 SPI Programming Header (Debug ONLY) (CN16) Pin Name Signal Type Signal Level...

  • Page 43: Cpu Fan (Cn17)

    E P I C B o a r d E P I C - B D U 7 2.34 CPU Fan (CN17) FAN_CTL FAN_CTL FAN_ TAC FAN_ TAC FAN_POWER FAN_POWER Pin Name Signal type Signal Level FAN_POWER +12V FAN_TAC FAN_CTL * Pin 4 is optional.

  • Page 44: Touchscreen Connector (Cn19)

    E P I C B o a r d E P I C - B D U 7 KB_CLK +5VSB MS_DATA MS_CLK 2.36 Touchscreen Connector (CN19) 8 Wires 4 Wires TOP EXCITE BOTTOM EXCITE BOTTOM LEFT EXCITE LEFT RIGHT RIGHT EXCITE TOP SENSE BOTTOM SENSE LEFT SENSE...
  • Page 45 E P I C B o a r d E P I C - B D U 7 RIGHT SENSE 8 Wires 4 Wires 5 Wires UL(Y) BOTTOM UR(H) LEFT LL(L) RIGHT LR(X) SENSE(S) 5 Wires Pin Name Signal Type Signal Level UL(Y) UR(H)
  • Page 46 E P I C B o a r d E P I C - B D U 7 8 Wires 4 Wires 5 Wires TOP EXCITE UL(Y) BOTTOM EXCITE BOTTOM UR(H) LEFT LL(L) LEFT EXCITE RIGHT EXCITE RIGHT LR(X) TOP SENSE SENSE(S) BOTTOM SENSE LEFT SENSE...

  • Page 47: Lcp Expansion Connector (Cn20)

    E P I C B o a r d E P I C - B D U 7 2.37 LCP Expansion Connector (CN20) LAD0 LAD1 LAD2 LAD3 +3.3V LFRAME# LRESET# LCLK LDRQ0 LDRQ1 SERIRQ Pin Name Signal Type Signal Level LAD0 +3.3V LAD1...

  • Page 48: Com Port 6 (Cn21)

    E P I C B o a r d E P I C - B D U 7 2.38 COM Port 6 (CN21) Pin Name Signal Type Signal Level ±9V ±9V ±9V 2.39 COM Port 5 (CN22) 2-32 Chapter 2 Quick Installation Guide...

  • Page 49: Com Port 1 (Optional) (Cn23)

    E P I C B o a r d E P I C - B D U 7 Pin Name Signal Type Signal Level ±9V ±9V ±9V 2.40 COM Port 1 (Optional) (CN23) Pin Name Signal Type Signal Level ±9V ±9V 2-33 Chapter 2 Quick Installation Guide...

  • Page 50: Lvds Port 1/Edp Inverter / Backlight Connector (Cn24)

    E P I C B o a r d E P I C - B D U 7 ±9V 2.41 LVDS Port 1/eDP Inverter / Backlight Connector (CN24) BLK_PWR BKL_CONTROL BKL_ENABLE Pin Name Signal Type Signal Level BKL_PWR +5V / +12V BKL_CONTROL BKL_ENABLE * LVDS1/BKL_PWR can be set to +5V or +12V by JP10.

  • Page 51: Lvds Port 1/Edp (Cn25)

    E P I C B o a r d E P I C - B D U 7 2.42 LVDS Port 1/eDP (CN25) PIN 29 PIN 30 PIN 1 PIN 2 LVDS Pin Name Signal Type Signal Level BKL_ENABLE BKL_CONTROL LCD_PWR +3.3V/+5V LVDS_A_CLK-...
  • Page 52 E P I C B o a r d E P I C - B D U 7 LVDS_DA1+ DIFF LVDS_DA2- DIFF LVDS_DA2+ DIFF LVDS_DA3- DIFF LVDS_DA3+ DIFF DDC_DATA +3.3V DDC_CLK +3.3V LVDS_DB0- DIFF LVDS_DB0+ DIFF LVDS_DB1- DIFF LVDS_DB1+ DIFF LVDS_DB2- DIFF LVDS_DB2+...
  • Page 53 E P I C B o a r d E P I C - B D U 7 Pin Name Signal Type Signal Level BKL_ENABLE BKL_CONTROL LCD_PWR +3.3V/+5V eDP_DA3- DIFF eDP_DA3+ DIFF LCD_PWR +3.3V/+5V eDP_DA2- DIFF eDP_DA2+ DIFF eDP_DA1- DIFF eDP_DA1+ DIFF eDP_DA0-...

  • Page 54: 100M/1G Ethernet Port 1 (Cn26)

    E P I C B o a r d E P I C - B D U 7 LCD_PWR +3.3V/+5V 2.43 10M/100M/1G Ethernet Port 1 (CN26) ACT/LINK SPEED Pin Name Signal Type Signal Level MDI0+ DIFF MDI0- DIFF MDI1+ DIFF 2-38 Chapter 2 Quick Installation Guide...

  • Page 55: 100M/1G Ethernet Port 2 (Cn27)

    E P I C B o a r d E P I C - B D U 7 MDI2+ DIFF MDI2- DIFF MDI1- DIFF MDI3+ DIFF MDI3- DIFF Standard IEEE 802.3 Ethernet interface for 1000BASE-T, 100BASE-TX, and 10BASE-T applications is provided for by Intel® LAN 2.44 10M/100M/1G Ethernet Port 2 (CN27) ACT/LINK SPEED...

  • Page 56: Com Port 4 (Cn28)

    E P I C B o a r d E P I C - B D U 7 2.45 COM Port 4 (CN28) Pin Name Signal Type Signal Level ±9V ±9V ±9V 2.46 COM Port 3 (RS-232/422/485) (CN29) 2-40 Chapter 2 Quick Installation Guide...
  • Page 57 E P I C B o a r d E P I C - B D U 7 RS-232 Pin Name Signal Type Signal Level ±6V ±6V ±6V RI/+5V/+12V IN/ PWR +5V/+12V RS-422 Pin Name Signal Type Signal Level RS422_TX- ±5V RS422_TX+ RS422_RX+...
  • Page 58 E P I C B o a r d E P I C - B D U 7 RS422_RX- NC/+5V/+12V +5V/+12V RS-485 Pin Name Signal Type Signal Level RS485_D- ±5V RS485_D+ ±5V NC/+5V/+12V +5V/+12V COM3 RS-232/422/485 can be set by BIOS settings. Default is RS-232 Function for Pin 8 can be set by JP14 2-42 Chapter 2 Quick Installation Guide...

  • Page 59: Usb 2.0/3.0 Port 1 & 2 (Cn30)

    E P I C B o a r d E P I C - B D U 7 2.47 USB 2.0/3.0 Port 1 & 2 (CN30) Port 2 11 12 13 Port 1 2 3 4 Pin Name Signal Type Signal Level +5VSB USB1_D-...

  • Page 60: Display Port 2 (Cn31)

    E P I C B o a r d E P I C - B D U 7 USB2_SSTX− DIFF USB2_SSTX+ DIFF 2.48 Display Port 2 (CN31) Pin Name Signal Type Signal Level Lane0+ Lane0- Lane1+ Lane1- Lane2+ Lane2- Lane3+ Lane3- 2-44 Chapter 2 Quick Installation Guide...

  • Page 61: Lvds Port 2 (Cn32)

    E P I C B o a r d E P I C - B D U 7 AUX+ AUX- Hot Plug Detect Return PWR (GND) DP_PWR +3.3V 2.49 LVDS Port 2 (CN32) PIN 29 PIN 30 PIN 1 PIN 2 Pin Name Signal Type Signal Level...
  • Page 62 E P I C B o a r d E P I C - B D U 7 LVDS_DC0- DIFF LVDS_DC0+ DIFF LVDS_DC1- DIFF LVDS_DC1+ DIFF LVDS_DC2- DIFF LVDS_DC2+ DIFF LVDS_DC3- DIFF LVDS_DC3+ DIFF DDC_DATA +3.3V DDC_CLK +3.3V LVDS_DD0- DIFF LVDS_DD0+ DIFF LVDS_DD1-...

  • Page 63: Com Port 1 & 2 (Cn33)

    E P I C B o a r d E P I C - B D U 7 LVDS_D_CLK- DIFF LVDS_D_CLK+ DIFF * LVDS2 LCD_PWR can be set to +3.3V or +5V by JP18 * The max. driving current is 2A 2.50 COM Port 1 &...
  • Page 64 E P I C B o a r d E P I C - B D U 7 RI_+5V_+12V IN/PWR +5V/+12V COM2 (RS-422) Pin Name Signal Type Signal Level 422TXD- 422TXD+ 422RXD+ 422RXD- 422RXD- NC/+5V/+12V +5V/+12V COM2 (RS-485) Pin Name Signal Type Signal Level 485D-...

  • Page 65: Vga Port (Cn34)

    E P I C B o a r d E P I C - B D U 7 NC/+5V/+12V +5V/+12V 2.51 VGA Port (CN34) Pin Name Signal Type Signal Level GREEN BLUE RED_GND_RTN GREEN_GND_RTN BLUE_GND_RTN CRT_PLUG# DDC_DATA HSYNC VSYNC DDC_CLK 2-49 Chapter 2 Quick Installation Guide...

  • Page 66: Display Port 1 (Cn35)

    E P I C B o a r d E P I C - B D U 7 2.52 Display Port 1 (CN35) Pin Name Signal Type Signal Level Lane0+ Lane0- Lane1+ Lane1- Lane2+ Lane2- Lane3+ Lane3- AUX+ AUX- 2-50 Chapter 2 Quick Installation Guide...

  • Page 67: Lvds Port 2 Inverter / Backlight Connector (Cn36)

    E P I C B o a r d E P I C - B D U 7 Hot Plug Detect Return PWR (GND) DP_PWR +3.3V 2.53 LVDS Port 2 Inverter / Backlight Connector (CN36) BLK_PWR BKL_CONTROL BKL_ENABLE Pin Name Signal Type Signal Level BKL_PWR...

  • Page 68: Minicard (Full-Size) (Cn38)

    E P I C B o a r d E P I C - B D U 7 Pin Name Signal Type Signal Level +5VSB USB5_D- DIFF USB5_D+ DIFF 2.55 MiniCard (Full-size) (CN38) Pin Name Signal Type Signal Level PCIE_WAKE# +3.3VSB +3.3V +1.5V...
  • Page 69 E P I C B o a r d E P I C - B D U 7 UIM_RST UIM_VPP W_DISABLE# +3.3V PCIE_RST# +3.3V PCIE_RX- DIFF +3.3VSB +3.3V PCIE_RX+ DIFF +1.5V +1.5V SMB_CLK +3.3V PCIE_TX- DIFF SMB_DATA +3.3V PCIE_TX+ DIFF 2-53 Chapter 2 Quick Installation Guide...
  • Page 70 E P I C B o a r d E P I C - B D U 7 USB_D- DIFF USB_D+ DIFF +3.3VSB +3.3V +3.3VSB +3.3V +1.5V +1.5V +3.3VSB +3.3V 2-54 Chapter 2 Quick Installation Guide...

  • Page 71: Sata Port 1 (Sata1)

    E P I C B o a r d E P I C - B D U 7 2.56 SATA Port 1 (SATA1) Pin 1 Pin 7 Pin Name Signal Type Signal Level SATA_TX0+ DIFF SATA_TX0- DIFF SATA_RX0- DIFF SATA_RX0+ DIFF 2.57 SATA Port 2 (SATA2) Pin 1...

  • Page 72: Ddr3L Sodimm (Dimm1)

    E P I C B o a r d E P I C - B D U 7 SATA_RX1+ DIFF 2.58 DDR3L SODIMM (DIMM1) Standard Specification 2-56 Chapter 2 Quick Installation Guide...

  • Page 73: Chapter 3 Ami Bios Setup

    E P I C B o a r d E P I C - B D U 7 Chapter BIOS Setup Chapter 3 AMI BIOS Setup 3-1...

  • Page 74: System Test And Initialization

    3. The CMOS memory has lost power and the configuration information has been erased. The EPIC-BDU7 CMOS memory has an integral lithium battery backup for data retention. However, you will need to replace the complete unit when it finally runs down.

  • Page 75: Ami Bios Setup

    E P I C B o a r d E P I C - B D U 7 3.2 AMI BIOS Setup AMI BIOS ROM has a built-in Setup program that allows users to modify the basic system configuration. This type of information is stored in battery-backed CMOS RAM and BIOS NVRAM so that it retains the Setup information when the power is turned off.
  • Page 76 E P I C B o a r d E P I C - B D U 7 Setup submenu: Main Options summary: (default setting) System Language English Only English support in this BIOS System Date Day MM:DD:YYYY Change the month, year and century. The ‘Day’ is changed automatically. System Time HH : MM : SS Change the clock of the system.
  • Page 77 E P I C B o a r d E P I C - B D U 7 Setup submenu: Advanced Options summary: (default setting) CPU Configuration CPU Configuration Parameters SATA Configuration SATA Controller/ Serial ATA Port Parameters Power Management System ACPI/Power Mode/Wake Event Configuration SIO Configuration Super IO Configuration Parameters...
  • Page 78 E P I C B o a r d E P I C - B D U 7 AMT Configuration AMT Configuration Settings CSM Configuration CSM Configuration Parameters Trusted Computing Trusted Computing Settings USB Configuration USB Configuration Parameters Digital IO Port Configuration DIO configuration Chapter 3 AMI BIOS Setup 3-6...
  • Page 79 E P I C B o a r d E P I C - B D U 7 CPU Configuration Options summary: (default setting) Hyper-threading Disabled Enabled Enable for Windows XP Active Processor Cores All for Windows XP Limit CPUID Maximum Disabled Enabled Disabled for Windows XP...
  • Page 80 E P I C B o a r d E P I C - B D U 7 Execute Disable Bit Disabled Enabled En/Disable XD bit for supporting OS Intel Virtualization Disabled Technology Enabled Wen enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology EIST Disabled...
  • Page 81 E P I C B o a r d E P I C - B D U 7 Enable/Disable CPU C6 report to OS CPU C7 report Disabled CPU C7 CPU C7s Enable/Disable CPU C7 report to OS ACPI CTDP BIOS Disabled Enabled Enable/Disable ACPI CTDP BIOS support...
  • Page 82 E P I C B o a r d E P I C - B D U 7 SATA Configuration Options summary: (default setting) SATA Controller(s) Disabled Enabled En/Disable SATA Device SATA Controller Speed Default Gen1 Gen2 Gen3 Indicates the maximum speed the SATA controller can support SATA Port1/Port2/mSATA Enabled Chapter 3 AMI BIOS Setup 3-10...
  • Page 83 E P I C B o a r d E P I C - B D U 7 Port Disabled Enabled/Disabled SATA Port1/Port2 HotPlug Disabled Enabled Enabled/Disabled SATA Port1/Port2 HotPlug function Power Management Options summary: (default setting) ATX Type Power Mode AT Type Chapter 3 AMI BIOS Setup 3-11...
  • Page 84 E P I C B o a r d E P I C - B D U 7 Select system power mode Power Saving (ERP) Disabled Control Enabled Configure power mode for power saving function Power Off Restore AC Power Loss Power on Late State Select AC power state when power is re-applied after a power failure...
  • Page 85 E P I C B o a r d E P I C - B D U 7 Options summary: (default setting) Wake system with Fixed Disabled Time Enabled Enable or disable System wake on alarm event. Wake up time is setting by following settings.
  • Page 86 E P I C B o a r d E P I C - B D U 7 Wake up minute 0-59 Wake up second 0-59 Wake system with Disabled Dynamic Time Enabled Enable or disable System wake on alarm event. Wake up time is current time + Increase minutes.
  • Page 87 E P I C B o a r d E P I C - B D U 7 SIO Configuration Options summary: (default setting) Serial Port 1/2/3/4/5/6 Configuration Set Parameters of Serial Port 1/2/3/4/5/6 Parallel Port Configuration Set Parameters of Parallel Port Chapter 3 AMI BIOS Setup 3-15...
  • Page 88 E P I C B o a r d E P I C - B D U 7 Serial Port 1/2/3/4/5/6 Configuration Options summary: (default setting) Use This Device Disabled Enabled En/Disable specified serial port. Possible Auto (COM1) IO=3F8h; IRQ=4; DMA; IO=3F8h;...
  • Page 89 E P I C B o a r d E P I C - B D U 7 Possible Auto (COM2) IO=2F8h; IRQ=3; DMA; IO=3F8h; IRQ=3,4,5,7,9,10,11,12; DMA; IO=2F8h; IRQ=3,4,5,7,9,10,11,12; DMA; IO=3E8h; IRQ=3,4,5,7,9,10,11,12; DMA; IO=2E8h; IRQ=3,4,5,7,9,10,11,12; DMA; Possible Auto (COM3) IO=3E8h; IRQ=7; DMA IO=3E8h;...
  • Page 90 E P I C B o a r d E P I C - B D U 7 Possible Auto (COM6) IO=2C0h; IRQ=7; DMA IO=3E8h; IRQ=3,4,5,6,7,10,11,12; DMA IO=2E8h; IRQ=3,4,5,6,7,10,11,12; DMA IO=2D0h; IRQ=3,4,5,6,7,10,11,12; DMA IO=2C0h; IRQ=3,4,5,6,7,10,11,12; DMA Select a resource setting for Super IO device. Mode RS232 RS422...
  • Page 91 E P I C B o a r d E P I C - B D U 7 Parallel Port Configuration Options summary: (default setting) Parallel Port Disabled Enabled En/Disable specified this Logical Device Note: LPT and DIO feature share the same interface CN9 on the board. When LPT disabled, the interface works in DIO mode and vice versa.
  • Page 92 E P I C B o a r d E P I C - B D U 7 IO=3BCh; IRQ=5,6,7,9,10,11,12; IO=378h; IO=778h; IRQ=5; DMA=3; ECP and EPP IO=378h; IO=778h; IRQ=5,6,7,9,10,11,12; DMA=1,3; IO=278h; IO=678h; IRQ=5,6,7,9,10,11,12; DMA=1,3; IO=3BCh; IO=7BCh; IRQ=5,6,7,9,10,11,12; DMA=1,3; Select a resource setting for Super IO device. Mode STD Print Mode SPP Mode...
  • Page 93 E P I C B o a r d E P I C - B D U 7 Hardware Monitor Options summary: (default setting) Smart Fan Disabled Enabled En/Disable specified Smart Fan. Chapter 3 AMI BIOS Setup 3-21...
  • Page 94 E P I C B o a r d E P I C - B D U 7 Smart Fan Configuration Options summary: (default setting) Fan Mode Manual Duty Auto Duty Smart Fan Mode Select Chapter 3 AMI BIOS Setup 3-22...
  • Page 95 E P I C B o a r d E P I C - B D U 7 AMT Configuration Options summary: (default setting) Un-Configure ME Disabled Enabled Un-configure ME without password. Disable ME Disabled Enabled Set ME to soft Temporary Disabled. Chapter 3 AMI BIOS Setup 3-23...
  • Page 96 E P I C B o a r d E P I C - B D U 7 CSM Configuration Options summary: (default setting) Option ROM Messages Force BIOS Keep Current Set display mode for Option ROM Boot option filter UEFI and Legacy Legacy only UEFI only...
  • Page 97 E P I C B o a r d E P I C - B D U 7 Legacy Controls the execution of UEFI and Legacy Storage OpROM Other PCI devices Do not launch UEFI Legacy Determines OpROM execution policy for devices other than Network, Storage, or Video Chapter 3 AMI BIOS Setup 3-25...
  • Page 98 E P I C B o a r d E P I C - B D U 7 Trusted Computing Options summary: (default setting) Security Device Support Disabled Enabled En/Disable TPM support. TPM State Disabled Enabled En/Disable TPM functionality. Pending TPM Operation None TPM Clear Select one-time TPM operation.
  • Page 99 E P I C B o a r d E P I C - B D U 7 Device Select Auto TPM 1.2 TPM 2.0 Set Auto option for Device Select Chapter 3 AMI BIOS Setup 3-27...
  • Page 100 E P I C B o a r d E P I C - B D U 7 USB Configuration Options summary: (default setting) Legacy USB Support Enabled Disabled Auto Enables BIOS Support for Legacy USB Support. When enabled, USB can be functional in legacy environment like DOS.
  • Page 101 E P I C B o a r d E P I C - B D U 7 Enable/Disable USB Mass Storage Driver Support Chapter 3 AMI BIOS Setup 3-29...
  • Page 102 E P I C B o a r d E P I C - B D U 7 Digital IO Port Configuration Options summary: (default setting) DIO Port Input 1/2/3/4/5/6/7/8 Output Set DIO Port 1/2/3/4/5/6/7/8 as Input or Output DIO Port Input 9/10/11/12/13/14/15/16 Output...
  • Page 103 E P I C B o a r d E P I C - B D U 7 Set GPIO Level when used as Output Chapter 3 AMI BIOS Setup 3-31...
  • Page 104 E P I C B o a r d E P I C - B D U 7 Setup submenu: Chipset Options summary: (default setting) System Agent (SA) Configuration System Agent (SA) Parameters Graphics Configuration Configure Graphics Settings. PCH-IO Configuration Configure PCH Parameters Chapter 3 AMI BIOS Setup 3-32...
  • Page 105 E P I C B o a r d E P I C - B D U 7 System Agent (SA) Configuration Options summary: (default setting) Memory Frequency Limiter Auto 1333 1600 Maximum Memory Frequency Selections in Mhz. Max TOLUD Dynamic 1 GB 1.25 GB...
  • Page 106 E P I C B o a r d E P I C - B D U 7 2 GB 2.25 GB 2.5 GB 2.75 GB 3 GB 3.25 GB Maximum Value of TOLOUD. Dynamic assignment would adjust TOLUD automatically base on largest MMIO length of installed graphic controller.
  • Page 107 E P I C B o a r d E P I C - B D U 7 Graphics Configuration Options summary: (default setting) Internal Graphics Auto Disabled Enabled Keep IGD enabled based on the setup option. DVMT Total Gfx Mem 128M 256M Select DVMT5.0 Total Graphic Memory size used by the internal Graphic Device.
  • Page 108 E P I C B o a r d E P I C - B D U 7 RC6(Render Standby) Disabled Enabled Check to enable render standby support. Primary Boot Display VBIOS Default LVDS1 DisplayPort Select the Video Device which will be activated during POST. This has no effect if external graphics present.
  • Page 109 E P I C B o a r d E P I C - B D U 7 LVDS Panel Configuration Options summary: (default setting) LVDS1 Disabled Enabled Enable or Disable LVDS interface Panel Type 640x480 800x480 800x600 1024x600 1024x768 1280x768 Chapter 3 AMI BIOS Setup 3-37...
  • Page 110 E P I C B o a r d E P I C - B D U 7 1280x1024 1366x768 1440x900 1600x1200 1920x1080 1920x1200 Select panel resolution. Color Depth 18-Bit 24-Bit 36-Bit 48-Bit Select color depth of the panel Backlight Type Inverted Normal Select Backlight control type.
  • Page 111 E P I C B o a r d E P I C - B D U 7 100% Select Backlight Level Chapter 3 AMI BIOS Setup 3-39...
  • Page 112 E P I C B o a r d E P I C - B D U 7 PCH-IO Configuration Options summary: (default setting) Azalia Disabled Enabled Enable or disabled Azalia device for audio function. Hot Plug for Disabled Mini-card Slot 1(Half-size) Enabled Mini-card Slot 2(Full-size) Enabled/Disabled PCIe Hot Plug feature for the port.
  • Page 113 E P I C B o a r d E P I C - B D U 7 Mini-card Slot 2(Full-size) Gen2 Select PCI Express port speed. ASPM for Disabled Mini-card Slot 1(Half-size) Mini-card Slot 2(Full-size) Onboard LAN2 NIC L0sL1 Auto Set the ASPM Level: Force L0s-Force all links to L0s State...
  • Page 114 E P I C B o a r d E P I C - B D U 7 Setup submenu: Security Options summary: (default setting) Administrator Password/ Not set User Password Chapter 3 AMI BIOS Setup 3-42...
  • Page 115 E P I C B o a r d E P I C - B D U 7 You can install a Supervisor password, and if you install a supervisor password, you can then install a user password. A user password does not provide access to many of the features in the Setup utility.
  • Page 116 E P I C B o a r d E P I C - B D U 7 Setup submenu: Boot Options summary: (default setting) Quiet Boot Disabled Enabled En/Disable showing boot logo. Launch Network PXE Do not launch OpROM UEFI Legacy En/Disable network OpROM for PXE boot...
  • Page 117 E P I C B o a r d E P I C - B D U 7 The order of boot priorities. Chapter 3 AMI BIOS Setup 3-45...
  • Page 118 E P I C B o a r d E P I C - B D U 7 BBS Priorities Options summary: (default setting) Boot Option #x Disabled Device name Sets the system boot order Chapter 3 AMI BIOS Setup 3-46...
  • Page 119 E P I C B o a r d E P I C - B D U 7 Setup submenu: Exit Options summary: (default setting) Save Changes and Reset Reset the system after saving the changes Discard Changes and Reset Reset system setup without saving any changes Restore Defaults Restore/Load Default values for all the setup options.
  • Page 120 E P I C B o a r d E P I C - B D U 7 Select the boot device for this boot. Restore User Defaults Restore the User Defaults to all the setup options Chapter 3 AMI BIOS Setup 3-48...
  • Page 121 E P I C B o a r d E P I C - B D U 7 Chapter Driver Installation 4 - 1 Chapter 4 Driver Installation...
  • Page 122 E P I C B o a r d E P I C - B D U 7 The EPIC-BDU7 comes with a driver disk that contains all drivers and utilities you need to setup your product. Insert the disk and the installation guide will start automatically. If it doesn’t, please follow the sequence below to install the drivers.
  • Page 123 E P I C B o a r d E P I C - B D U 7 4.1 Installation Insert the EPIC-BDU7 driver disk into the disk drive and install the drivers from Step 1 to Step 10 in order. Step 1 – Install Chipset Driver 1.
  • Page 124 E P I C B o a r d E P I C - B D U 7 Step 3 – Install Audio Driver 1. Click on the STEP3 - Audio folder and select your OS 2. Open the Setup.exe file in the folder 3.
  • Page 125 E P I C B o a r d E P I C - B D U 7 Step 7 – Install USB 3.0 Driver (Windows 7 only) 1. Open the STEP7 - USB3.0 folder followed by Setup.exe 2. Follow the instructions 3.
  • Page 126 E P I C B o a r d E P I C - B D U 7 4 - 6 Chapter 4 Driver Installation...
  • Page 127 E P I C B o a r d E P I C - B D U 7 2. Reboot and log in as administrator 4 - 7 Chapter 4 Driver Installation...
  • Page 128 E P I C B o a r d E P I C - B D U 7 3. Run patch.bat as administrator 4 - 8 Chapter 4 Driver Installation...
  • Page 129 E P I C B o a r d E P I C - B D U 7 For Windows 8/ Windows 10: Open the Apps Screen, right click on the Command Prompt tile and select Run as Administrator 4 - 9 Chapter 4 Driver Installation...
  • Page 130 E P I C B o a r d E P I C - B D U 7 To install the driver (patch.bat), you will first have to locate the file in command prompt. To do that, first go to the directory which contains the file by entering <drive letter>: eg.
  • Page 131 E P I C B o a r d E P I C - B D U 7 Reboot after installation completes. To confirm the installation, go to Device Manager, expand the Ports (COM & LPT) tree and double click on any of the COM ports to open its properties.

  • Page 132: Watchdog Timer

    E P I C B o a r d E P I C - B D U 7 Appendix Programming the Watchdog Timer Appendix A Programming the Watchdog Timer...
  • Page 133 E P I C B o a r d E P I C - B D U 7 A.1 Watchdog Timer Registers Table 1 : Watch dog relative IO address Default Value Note I/O Base I/O Base address for Watchdog operation. 0xA10 Address This address is assigned by SIO LDN7, register 0x60-0x61.

  • Page 134: A.2 Watchdog Sample Program

    E P I C B o a r d E P I C - B D U 7 A.2 WatchDog Sample Program ****************************************************************************** // WDT I/O operation relative definition (Please reference to Table 1) #define WDTAddr 0x510 // WDT I/O base address Void WDTWriteByte(byte Register, byte Value);...
  • Page 135 E P I C B o a r d E P I C - B D U 7 AaeonWDTEnable(); ******************************************************************************* ******************************************************************************* // Procedure : AaeonWDTEnable VOID AaeonWDTEnable () WDTEnableDisable(1); // Procedure : AaeonWDTConfig VOID AaeonWDTConfig (byte Counter, BOOLEAN Unit) // Disable WDT counting WDTEnableDisable( // Clear Watchdog Timeout Status WDTClearTimeoutStatus();...
  • Page 136 E P I C B o a r d E P I C - B D U 7 WDTSetBit( TimerReg, PSWidthBit, PSWidthVal // Watchdog WDTRST# Enable WDTSetBit( DevReg, WDTRstBit, WDTRstVal VOID WDTClearTimeoutStatus() WDTSetBit( TimerReg, StatusBit, 1 ******************************************************************************* ******************************************************************************* VOID WDTWriteByte(byte Register, byte Value) IOWriteByte(WDTAddr+Register, Value);...
  • Page 137 E P I C B o a r d E P I C - B D U 7 Appendix I/O Information Appendix B I/O Information...

  • Page 138: B.1 I/O Address Map

    E P I C B o a r d E P I C - B D U 7 B.1 I/O Address Map Appendix B I/O Information...
  • Page 139 E P I C B o a r d E P I C - B D U 7 Appendix B I/O Information...

  • Page 140: B.2 Memory Address Map

    E P I C B o a r d E P I C - B D U 7 B.2 Memory Address Map Appendix B I/O Information...

  • Page 141: B.3 Irq Mapping Chart

    E P I C B o a r d E P I C - B D U 7 B.3 IRQ Mapping Chart Appendix B I/O Information...
  • Page 142 E P I C B o a r d E P I C - B D U 7 Appendix B I/O Information...
  • Page 143 E P I C B o a r d E P I C - B D U 7 Appendix B I/O Information...
  • Page 144 E P I C B o a r d E P I C - B D U 7 Appendix B I/O Information...
  • Page 145 E P I C B o a r d E P I C - B D U 7 Appendix B I/O Information...
  • Page 146 E P I C B o a r d E P I C - B D U 7 B-10 Appendix B I/O Information...
  • Page 147 E P I C B o a r d E P I C - B D U 7 B-11 Appendix B I/O Information...
  • Page 148 E P I C B o a r d E P I C - B D U 7 B-12 Appendix B I/O Information...
  • Page 149 E P I C B o a r d E P I C - B D U 7 B-13 Appendix B I/O Information...
  • Page 150 E P I C B o a r d E P I C - B D U 7 B-14 Appendix B I/O Information...
  • Page 151 E P I C B o a r d E P I C - B D U 7 B-15 Appendix B I/O Information...
  • Page 152 E P I C B o a r d E P I C - B D U 7 B-16 Appendix B I/O Information...

  • Page 153: B.4 Dma Channel Assignments

    E P I C B o a r d E P I C - B D U 7 B.4 DMA Channel Assignments B-17 Appendix B I/O Information...
  • Page 154 E P I C B o a r d E P I C - B D U 7 Appendix Mating Connectors Appendix C Mating Connector C...

  • Page 155: C.1 List Of Mating Connectors And Cables

    E P I C B o a r d E P I C - B D U 7 C.1 List of Mating Connectors and Cables The table notes mating connectors and available cables. Mating Connector Connector Available Cable P/N Function Label Cable Vendor...
  • Page 156 E P I C B o a r d E P I C - B D U 7 CPU Fan CN17 Molex 22-01-2035 Connector P/S2 KB/MS P/S2 KB/MS CN18 Molex 51021-0600 1700060158 Connector Cable Touch Screen SHR-9V-S- CN19 Connector COM Port 6 Serial Port CN21 Molex...
  • Page 157 E P I C B o a r d E P I C - B D U 7 Appendix Electrical Specifications for I/O Ports Appendix D Electrical Specifications for I/O Ports...

  • Page 158: D.1 Electrical Specifications For I/O Ports

    E P I C B o a r d E P I C - B D U 7 D.1 Electrical Specifications for I/O Ports Reference Signal Name Rate Output LVDS Port1/eDP +5V/2A Inverter/Backlight CN24 +12V/2A Connector LVDS Port +5V/2A Inverter/Backlight CN36 +12V/2A Connector...
  • Page 159 E P I C B o a r d E P I C - B D U 7 LPC Port CN20 +3.3V +3.3V/0.5A LVDS Port1/eDP +5V/2A Inverter/Backlight CN24 +12V/2A Connector LVDS Port +5V/2A Inverter/Backlight CN36 +12V/2A Connector Appendix D Electrical Specifications for I/O Ports...
  • Page 160 E P I C B o a r d E P I C - B D U 7 Appendix Digital I/O Ports Appendix E Digital I/O Ports...

  • Page 161: E.1 Electrical Specifications For Digital I/O Ports

    E P I C B o a r d E P I C - B D U 7 E.1 Electrical Specifications for Digital I/O Ports Table 1 : Digital Input/Output Pin Electrical Specification Input Threshold Output Voltage Voltage Type Note High High DIO1...
  • Page 162 EPIC-BDU7 utilizes FINTEK F81866D chipset as its Digital I/O controller. Below are the procedures to complete its configuration and the AAEON initial DIO program is also attached based on which you can develop customized program to fit your application. There are three steps to complete the configuration setup: (1) Enter the MB PnP Mode;...

  • Page 163: E.3 Digital I/O Register

    E P I C B o a r d E P I C - B D U 7 E.3 Digital I/O Register Table 2 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E 0x2E or 0x4E SIO MB PnP Mode Data Register Data...
  • Page 164 E P I C B o a r d E P I C - B D U 7 GPIO9 Output Level 0x06 0x81 GPIO10 Output Level 0x06 0x81 GPIO11 Output Level 0x06 0x81 GPIO12 Output Level 0x06 0x81 GPIO13 Output Level 0x06 0x81 GPIO14 Output Level...

  • Page 165: E.4 Digital I/O Sample Program

    E P I C B o a r d E P I C - B D U 7 E.4 Digital I/O Sample Program ************************************************************************** // SuperIO relative definition (Please reference to Table 2) #define SIOIndex 0x2E #define SIOData 0x2F #define DIOLDN 0x06 IOWriteByte(byte IOPort, byte Value);...
  • Page 166 E P I C B o a r d E P I C - B D U 7 ************************************************************************** ************************************************************************** Main VOID Boolean PinStatus ; // Procedure : AaeonReadPinStatus // Input : Example, Read Digital I/O Pin 3 status // Output : InputStatus : 0: Digital I/O Pin level is low 1: Digital I/O Pin level is High...
  • Page 167 E P I C B o a r d E P I C - B D U 7 ConfigDioMode( PinBit, OutputPin if ( < PinBit Pin9Bit SIOBitSet( DIOLDN, OutputReg_L, PinBit, Value } else SIOBitSet( DIOLDN, OutputReg _H, PinBit - Pin9Bit, Value ******************************************************************************** ********************************************************************************VOID SIOEnterMBPnPMode()
  • Page 168 E P I C B o a r d E P I C - B D U 7 VOID SIOByteSet(byte LDN, byte Register, byte Value) SIOEnterMBPnPMode(); SIOSelectLDN(LDN); IOWriteByte(SIOIndex, Register); IOWriteByte(SIOData, Value SIOExitMBPnPMode(); ******************************************************************************** ******************************************************************************** Boolean SIOBitRead(byte LDN, byte Register, byte BitNum) Byte TmpValue;...
  • Page 169 E P I C B o a r d E P I C - B D U 7 IOWriteByte(SIOIndex, DirReg_H); TmpValue = IOReadByte(SIOData); TmpValue |= (Mode << (PinBit – Pin9Bit)); IOWriteByte(SIOData, DirReg_L); SIOExitMBPnPMode(); ************************************************************************** E-10 Appendix E Digital I/O Ports...

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