Texas Instruments TMS320C64X Programmer's Reference Manual page 116

DSP_minerror
Special Requirements Array GSP0_TABLE[] must be double-word aligned.
Implementation Notes
Benchmarks
4-88
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Bank Conflicts: No bank conflicts occur.
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Interruptibility: The code is interrupt-tolerant but not interruptible.
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The load double-word instruction is used to simultaneously load four
values in a single clock cycle.
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The inner loop is completely unrolled.
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The outer loop is 4 times unrolled.
Cycles 256/4 * 9 + 17 = 593
Codesize 352 bytes