Freescale Semiconductor TWR-VF65GS10 User Manual

Tower module
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TWR-VF65GS10 Tower Module
User's Manual
Rev. 1.1
Freescale Semiconductor Inc.

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Summary of Contents for Freescale Semiconductor TWR-VF65GS10

  • Page 1 TWR-VF65GS10 Tower Module User’s Manual Rev. 1.1 Freescale Semiconductor Inc.
  • Page 2: Table Of Contents

    Table of Contents Table of Contents ............................2 1 TWR-VF65GS10 Overview ........................3 1.1 Contents ....................................4 1.2 Tower Features ................................... 5 1.3 Getting Started ..................................6 1.4 Reference Documents ............................... 6 2 Hardware Description ........................... 7 2.1 VF61NS151CMK50 Microprocessor ........................... 7 2.2 Clocking ....................................
  • Page 3: Twr-Vf65Gs10 Overview

    TFT display, dual USB OTG with built in HS/FS/LS PHY, dual 10/100 Ethernet with L2 switch, and advanced security. The TWR-VF65GS10 is available as a stand-alone product, or can be obtained as part of a kit (TWR- VF65GS10-KIT, TWR-VF65GS10-DS5, TWR-VF65GS10-PRO). The kit includes the Tower Elevator Modules (TWR-ELEV), the Tower Serial Module (TWR-SER) or Tower Serial2 Module (TWR-SER2), and/or Tower LCD Display (TWR-LCD-RGB).
  • Page 4: Contents

    1.1 Contents The available TWR-VF65GS10 kits are detailed below. The TWR-VF65GS10 contents include: • TWR-VF65GS10 MPU module • Dual headed USB cable • Printed insert containing DS-5 license and links for software tools. • Quick Start Guide The TWR-VF65GS10-KIT contents include: •...
  • Page 5: Tower Features

    1.2 Tower Features Figure 2 and Figure 3 show the TWR-VF65GS10 with some its key features called out. The following list summarizes the features of the TWR-VF65GS10 Tower Module: Vybrid VF61NS151CMK50 Controller (Dual Core ARM Cortex A5 @ 500 MHz + ARM Cortex M4 •...
  • Page 6: Getting Started

    Figure 3: Back side of TWR-VF65GS10 1.3 Getting Started Follow the Quick Start Guide found printed in the TWR-VF65GS10 for the list of recommended steps for getting started. There are also lab walk-through guides available on the tool support page for the TWR- VF65GS10: http://www.freescale.com/TWR-VF65GS10.
  • Page 7: Hardware Description

    Freescale Tower System but can operate stand-alone. An on-board circuit referred to as OpenSDA provides a JTAG debug interface and a power supply input through a single USB micro-B connector. Figure 4 shows a block diagram of the TWR-VF65GS10. The following sections describe the hardware in more detail.
  • Page 8: Clocking

    There are two external clock sources on the Vybrid Tower board. One is a 24 MHz XOSC, and the other is a 32.768 kHz XOSC. Figure 5: TWR-VF65GS10 External Clock Options The 24 MHz XOSC connects to XTAL/EXTAL, and the 32 kHz XOSC connects to EXTAL32/XTAL32.
  • Page 9 Figure 6: Vybrid Clocking Diagram A PLL summary for the VF61NS151CMK50 device is as follows: TWR-VF65GS10 User Manual Page 9 of 20...
  • Page 10: System Power

    Manual. 2.3 System Power In stand-alone operation, the main power source for the TWR-VF65GS10 module is derived from the 5.0V input from the USB micro-B connector, J3. A low-dropout regulator provides a 3.3V supply from the 5.0V input voltage. Refer to sheet 5 of the TWR-VF65GS10 schematics for more details.
  • Page 11: Securertc Vbat

    The Secure Real Time Clock (SecureRTC) module can be operational in the event there is an external power supply failure. The TWR-VF65GS10 provides a battery holder for a coin cell battery that can be used as the VBAT supply. Jumper J1 determines if VBAT is powered by the coin cell battery or the main board power.
  • Page 12: Cortex Jtag Connector

    TWR-VF65GS10, refer to the OpenSDA Readme document available at www.freescale.com/twr-vf65gs10. 2.4.2 Cortex JTAG Connector Typical JTAG debugging can use the 19-pin Cortex-M debug header located at J5. 2.4.3 Cortex JTAG+Trace Connector For more robust debugging, the 38-pin Mictor connector can be used. In addition to the normal JTAG debug pins (TDI, TDO, TMS, TCLK, RESET), several additional Trace pins are connected to the JTAG+Trace connector (J11), as shown below.
  • Page 13: Ddr3/Lpddr2 Memory

    DCU0_PCLK. The secondary DCU (DCU1) is not supported on the TWR-VF65GS10 board. Also, the original TWR-LCD, which mounts to the primary side of the elevator, cannot be used with the TWR- VF65GS10 board. 2.6 DDR3/LPDDR2 Memory The TWR-VF65GS10 contains 1Gb (128 MB) Samsung DDR3 Memory (K4B1G1646G-BCH9). The TWR- VF65GS10 board also features individual 1.5V and 0.75V supplies for DDR3 power and termination,...
  • Page 14: Quadspi Memory

    TWR-VF65GS10 Schematic. 2.11 General Purpose Tower Plug-in (TWRPI) Socket The TWR-VF65GS10 features a socket (J15 & J16) that can accept a variety of different Tower Plug-In (TWRPI) modules featuring sensors, RF transceivers, and more. The General Purpose TWRPI socket provides access to I2C, SPI, IRQs, GPIOs, timers, analog conversion signals, TWRPI ID signals, reset, and voltage supplies.
  • Page 15: Ethernet

    2.12 Ethernet The VF61NS151CMK50 features dual 10/100 Mbps Ethernet MACs with 1588 capability, L2 Switch, and support for MII and RMII interfaces. The TWR-VF65GS10 routes the RMII signals to both the primary and secondary sides of the Elevator. The TWR-VF65GS10 maintains compatibility with both the TWR-SER (single Ethernet) and TWR-SER2 (dual Ethernet) peripheral modules.
  • Page 16: Sd Digital Card Slot

    USB1 is available on the USB-A connector J12. 2.14 SD Digital Card Slot A micro Secure Digital (SD) card slot is available on the TWR-VF65GS10 connected to the SD Host Controller (SDHC1) signals of the VF6xx part. This slot will accept micro-SD memory cards. There are two SDHC modules on the VF61 device (SDHC0 &...
  • Page 17: Input/Output Connections And Pin Usage Table

    USB0 connected to on-board micro-B USB connector (J8) 4 Input/Output Connections and Pin Usage Table The table below provides details on which pins are used for LEDs, switches, and other I/O interfaces onboard the TWR-VF65GS10. TWR-VF65GS10 User Manual Page 17 of 20...
  • Page 18 PTB10 PTB10 TWRPI GPIO1 PTA20 PTA20 TWRPI GPIO2 PTB7 PTB7 TWRPI GPIO3 PTB6 PTB6 TWRPI GPIO4 PTB8 PTB8 General Purpose TWRPI ADC0 Input ADC1SE9 ADC1SE9 TWRPI Socket (J16) TWRPI ADC1 Input PTC31 ADC1SE5 TWR-VF65GS10 User Manual Page 18 of 20...
  • Page 19: Tower Elevator Connections

    5 Tower Elevator Connections The TWR-VF65GS10 features two expansion card-edge connectors that interface to the Primary and Secondary Elevator boards in a Tower system. Please refer to the Vybrid TWR-VF65GS10 Schematics for detail on Tower board pin out connectivity. TWR-VF65GS10 User Manual...
  • Page 20: Optional Low Power Configuration Using Ddr3

    The pull-up on DDR_RESET will prevent the DDR3 module from resetting (DDR_RESET is active low) when entering LPSTOPx mode on the Vybrid device. The pull-down on DDR_CKE will allow the DDR3 module to stay in self-refresh (low power) mode until it is released by the application software. TWR-VF65GS10 User Manual Page 20 of 20...

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