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7.4.4 User Defined Assembly Instance
(1) Output (from master to inverter): o31=102
word
bit 15
14
13
0
User-defined function code 1 (write) (data of function code specified by o40)
1
User-defined function code 2 (write) (data of function code specified by o41)
2
User-defined function code 3 (write) (data of function code specified by o42)
3
User-defined function code 4 (write) (data of function code specified by o43)
(2) Input (from inverter to master): o32=103
word
bit 15
14
13
0
User-defined function code 1 (read) (data of function code specified by o48)
1
User-defined function code 2 (read) (data of function code specified by o49)
2
User-defined function code 3 (read) (data of function code specified by o50)
3
User-defined function code 4 (read) (data of function code specified by o51)
7.4.5 Access to Function Codes
(1) Request for access to function codes (from master to inverter): o31=104
word bit 15
14
13
0
RST
XR
XF
1
User-defined function code 1 (write) (data of function code specified by o40)
2
Access to function code (group) + Access to function code (number) (Refer to Table 7.2.)
3
Access to function code (write data)
* Whether the inverter has terminals [X8] and [X9] depends upon the product specifications of the FRENIC-MEGA
inverter. For details, refer to the FRENIC-MEGA Instruction Manual, Chapter 5 "FUNCTION CODES."
(2) Response to request for access to function codes (from inverter to master): o32=105
word bit 15
14
13
0
BUSY ERR ACK
1
User-defined function code 1 (read) (data of function code specified by o48)
2
Access to function code (group) + Access to function code (number) (Refer to Table 7.2.)
3
Access to function code (read data/error code)
12
11
10
9
12
11
10
9
12
11
10
9
Access code X9 *
X8 *
12
11
10
9
RL
ALM DEC ACC
8
7
6
5
8
7
6
5
8
7
6
5
X7
X6
X5
X4
8
7
6
5
IL
VL
TL
NUV BRK
27
4
3
2
1
4
3
2
1
4
3
2
1
bit 0
X3
X2
X1
REV FWD
4
3
2
1
bit 0
INT
EXT
REV FWD
bit 0
bit 0
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