Chapter "~: Introduction; Architecture Overview - 3Com EtherLink/MC Technical Reference Manual

EtherLink/MC:
1
Introduction
1-1
Chapter 1: Introduction
The EtherLink/MC adapter is a 10 Megabit per second Ethemet adapter designed to be compatible
with IBM's Micro Channel architecture.
EtherLink/MC adapter features the following:
o 16-bit data path to and from the Micro Channel
~, Shared-memory packet data access method
• 16K on-board packet buffer RAM, expandable to 64K
• EtherStart ROM as an optional feature
- FCC Class B certification
® Complies with UL requirements
Architecture Overview
The EtherLink/MC adapter is based on the Intel 82586 Local Area Network Coprocessor. On the
network side of the 82586, the SEEQ 8023 or AMD 7992 Manchester Encoder/Decoder is used to
interface to the transceiver and the AMD '7996 is used as the transceiver chip in the on-board thin
Ethemet transceiver. On the host side, the 82586 and the Micro Channel arbitrate for access to the
shared 16K packet buffer RAM. Because the EtherLink/MC adapter has only one address/data bus,
any Micro Channel cycle directed at the adapter can cause arbitration to occur if the 82586 is active
at the time. Refer to figure 1 for a block diagram of the major functional sections of the adapter.