3Com EtherLink/MC Technical Reference Manual page 15

B
EtherLink/MC:
Programmable
Option Select
B-2
+RAM(l, 0)
Memory Mapped RAM/ROM Base Address. (Read/Write) These two bits select
where the 24K memory space of the adapter (16K RAM, 8K ROM) will be mapped
into the Micro Channel's memory space.
00
=
0C0000
01
=
0C8000
10
=
0D0000
11
=
0Dg000
-BNC On-Board Transceiver Enable. (Read/Write) Clearing this bit enables the on-board
thin Ethemet transceiver.
+IFBK(1, 0) Interrupt Channel Select Feedback. (Read Only) These bits indicate which interrupt
channel has been assigned to 82586 operations.
0 0 = 1 2
01 =7
1 0 = 3
1 1 = 9
NOTE: It is possible for the POST routine to incorrectly set the interrupt level. It is,
therefore, recommended that when determining the configuration of the adapter,
drivers should read the feedback bits +IFBK(1, 0) and then write the corresponding
interrupt select code to location XXX3H while in setup.mode. No other configuration
registers should ever be (or ever need to be) written to by drivers or applications.
Register
1: Location XXX3H
7 6 5 4
3 2 1 0
I
* * I
J I j +INT3 I +INT2 I +INT1 I+INT0
+INT(3, 0)
Interrupt Level Select. (Write Only) The lower four bits of this register are used to
select one of four possible interrupt channels (or levels) for use by the 82586. Each
bit corresponds to a separate interrupt channel.
0001 = 12
0010 =7
0100
= 3
1000 =9