Power-On Reset Circuit - Star Micronics TSP200 Series Technical Manual

2-4. Power-On Reset Circuit

The power-on reset signal initializes all elements so as to protect against possible operating errors at power-on. The signal
is held for approximately 160ms when power comes on. The reset circuit is shown below.
Fig. 2-13 Power-On Reset Circuit
+5V
IC3
VCC
CD OUT
+
GND
C9
RESET IC
1 At power-on, voltage detector IC3 (M51953BL) outputs a LOW signal from its OUT terminal. The signal is held
for approximately 160ms by the action of capacitor C9 (0.47µF), in accordance with the following relation:
T = 0.34 C9 (pF) [µs] = 160ms
2 The LOW signal generates reset of the CPU and gate array, and stops operation of the mechanism drive circuitry.
+5V
D1
Fig. 2-13 Power-On Reset Circuit
+5V
Drive circuit
IC1 : CPU
CPU
RES
RESO
– 21 –
PRINCIPLES OF OPERATION
+5V
+5V
IC4
RESET
Gate
array