Picture Distortion Correction Wavefonn; Generation Circuit; Cpu Periphery Circuit - Sony Multiscan GDM-2036S Service Manual

GDM-2036S
3-8-3. Picture Distortion Correction Waveform
Generation Circuit
This circuit is mainly composed of IC20l which makes the
wavefonn generation and IC202 which makes the wavefonn
correction.
The vertical sync pulse made in IC101 is input to pin
®
of
IC20l. And the FBT from the D3 board is input to pin @ of
IC201. The SAW wave of H cycle is output from pin @) of
IC20l, and the parabola wave from pin
@,
they
are
sent out
to the D3 board. Also, the SAW wave of V cycle is output
from pins
®
and @), and the parabola wave from pin @, they
are input to IC202.
The wavefonn is shaped by IC202, and the parabola wave of
V cycle (pins @ and @)
and that of 1/2 V cycle (pins
®,@
, @) and @) are output by IC202. The 1/2 V cycle parabola
wave is passed through RV6 and RV7, using for the
adjustment of the upper and lower sections of the V. STAT
convergence. Also, the sine wave according to the phase is
output from pin @ of IC202 by adjusting RV8. These
wavefonns are used as the basic waves of picture distortion
adjustment.
3-8-4. CPU Periphery Circuit
The operation of each pin of CPU (IC3) is explained here.
The horizontal sync signal and the vertical sync signal are
respectively input to pins @ and @. Also, the sync polarity
discrimination signal from the Bl board is input to pins
®
and
@.
Its timing is discriminated from these input signals,
the picture distortion correction data of the timing is sent out
from the memory, outputting to each D/A. The CPU
discriminates the timing, and after it is detennined, the mute
signal ("H" level) is output from pin @
for approx. 0.7 sec.
By this signal, 06 and 08 tum on, the H. SIZE becomes low,
and the horizontal sync becomes free-running. In the same,
way, after the timing is detennined, the mute signal is also
output from pin
~
for approx. 2 sec. By this signal, 02 turns
on, the contrast becomes minimum, and the picture becomes
dark. The timings of mute are as shown in Fig. 3-9. The 4-bit
S-shaped capacitor switching signal is output to pins @ to@
according to the frequency. The LEDs of the front panel are
lighted up after the outputs of pins
®
to
®,
@)
to
9
have
been passed through the LED driver of ICI.
The states of the front panel switches are input to pins
®
to @
. Also, the outputs from pins @ to
®
are the control signals
of
IC7
and
Ies
(E'PROM). IC7 and IC8 are the data
memories, and the picture distortion correction wavefonn data
is stored there. The contents of memory are as shown in Table
3-3.
Timing change Timing decision
Input signal
Mute Pin @
Mute Pin @
Horizontal sync
S-shaped capacitor
Pin @to@
Resonance capacitor
Pin@
+
t
Timing A
~",
_ _ _ _ _ _
",!
_T_i_m_in_g_B _ _ _ _ _ _ _
I,
6V
I
6V
...
.:-
I
~!,"~------------~·L~
1.2
sec.
Timing A
X
_______
~
", _ _ F_r_ee_ru_n_n_in_g_--,x Timing B
Timing A
\
All"l"
I
Timing B
Timing A
\
"l"
l
Timing B
Fig.
3-10
Timing chart
-32-