Ocp Circuit (Overcurrent Protector Circuit); Fall Mode; Board; Composition - Sony Multiscan GDM-2036S Service Manual

The SRT excitation current is a synthesizing of sine wave,
detennined by C and L (L
CH)
of CH. It is obtained by the
fonnula of the resonance frequency f=1/2
1(
JL CHeC, being
constant. Also, it can be controlled the power flowed to SRT
by varying the frequency as shown in Fig. 3-7.
®
has twice as higher input power as
® .
®
®
Fig. 3-7.
3-7-4. OCP circuit (Over current protector circuit)
After detecting the source currents of 02 and 04, it is
integrated and applied to the comparaters of IClOI and IClO2
respectively, and their oscillations are stopped.
As the primary ISV of low +B system is used for the Vcc of
ICIOI, when the oscillation of IClO2 stops (Low +B OCP,
OVP ... etc.), that of IClOl also stops. Therefore, the +B is shut
off.
In case the OCP and the OVP of +B system, the Low B is
output though the +B is shut off.
ICIOI
Fig. 3-8.
3-7-5. OVP clrcult(Over voltage protector circuit)
The +B OVP circuit (important for OHHS) detects the +B by
the absolute value, and. returns to the primary side by the
photo-coupler IClO to stop IClO!.
GDM-2036S
3-7-6. Fall mode
It goes down the +B only when short-circuiting +B, the
others are continued to output. When short-circuiting
±
12V,
IC2, IC3 and IC4 of 3-tenninal regulator's internal protection
circuit works. Therefore, only these lines are gone down.
For one of 6SV,
±
20V and 6.3V, as IClO2 stops when line
short-circuiting, all the outputs go down.
Also, tum off the power after clearing the obstruction when
+B goes down. And after a few seconds, tum on the power
again. Thus, it can be restored. However, it can not be started
again till the discharging of Rect. Out Ei as it is latched when
low +B goes down. It can be started again by discharging a
few times the both ends of 015 (ROlO) on the G board. But
as it is the primary side, be careful with an electric shock.
3-8. N BOARD
3-8-1. Composition
The N board is composed of the sync circuit, the basic
wavefonn generation circuit and the picture distortion
adjustment circuit by CPU.
3-8-2. Horizontal and Vertical Oscillations Sync
Circuit
This circuit is composed around IClOl to make the horiZontal
and vertical oscillations, AFC and AFC phase control, and
vertical oscillation sync. The flyback pulse (FBT) from the 03
board is detennined as a trigger, and it generates the SAW
wave compared with AFC. The capacity in pin @ of IClOl is
switched the value according to the frequency by the CPU
(IC3) control to obtain the suitable SAW wave.
The trigger pulse of H is input to pin
<D
of IClOl. Also, IC4
(O/A converter: hereinafter referred to as O/A) is controlled
by the CPU (IC3), and the charged current of pin
®
of IClOl
is changed by 0204 to 0206 to adjust the phase of the trigger
pulse. This pulse is compared with the SAW wave mentioned
above to make a horizontal sync. Also, the capacity in pin
®
of IClOl is switched the value according to the frequency by
the CPU (IC3) control.
The horizontal oscillation frequency is detennined by
controlling the charged current to pin
®
of ICIOI with the
adjustment of RVI and the signal from CPU (IC3). And the
horizontal sync signal adjusted the phase and the frequency is
output from pin @ of IClOl.
The vertical trigger pulse is input to pin
@)
of IClOl. The
voltage according to the frequency from the vertical trigger
pulse is made in IC27, and its pulse is input to pin @ of
IClO! to oscillate at the lower frequency than the trigger
pulse. And then it is forcibly locked by the trigger pulse,
outputting as the vertical sync signal from pin
@
of IClOl.
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