Siemens SITOP Series Function Manual page 56

Firmware v1.4: faceplates and communication blocks v2.4 for simatic step 7 v14 sp1, v15 and v15.1 tia
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SIMATIC STEP 7 function blocks
5.11 FB SITOP_PSU8600_Buffering
Input parameters
Table 5- 37
Parameter
Execute
HW_Ident_Head
Cyclic_IO_output_
memory_address
Buffering_In_Param
Structure of UDT_Data_Buffering data type
Table 5- 38
Parameter
Buffer_disable
Longlife_mode
Charge_ready_threshold
Power_interrupt_enable
Padding
Power_interrupt_deadtime
Power_interrupt_waittime
Power_interrupt_interrupttime
SITOP PSU8600 Firmware V1.4: Faceplates and Communication Blocks V2.4 for SIMATIC STEP 7 V14 SP1, V15 and V15.1 (TIA)
56
Data type
Bool
HW_IO
HW_IO
UDT_Data_Buffering
Data type
Byte
Byte
UInt
Byte
Byte
UInt
UDInt
UInt
Description
On the rising edge (0 > 1), data at the inputs of
the block is written to the PSU.
Start address of the entire main module.
(Reference, system tag: here, "PSU_1" refers to
the already assigned PROFINET device name of
the PSU main module.)
Address of main module IO data submodule.
(Reference, system tag: <PSU Device
Name>~PSU8600_IO_Data_submodule. For
example:
PSU_1~PSU8600_IO_Data_submodule)
UDT for buffering input parameters.
Description
Enables or disables buffer mode
(0 = no, any other value = yes)
Long life mode
(0 = no, any other value = yes)
Charge ready threshold (10 to 90 %)
Power interrupt enable
(0 = no, any other value = yes)
Unused
Power interrupt dead time (0 to 60000 ms)
Power interrupt wait time (0 to 300000 ms)
Power interrupt - interrupt time (0 to 60000 ms)
Function Manual, 11.2018, A5E37763954-09-76

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