Circuit Protection - Enfora Enabler LPP G Integration Manual

I = Input into Module
O = Output from Module

6.3. Circuit Protection

Other than very low level ESD protection within the module's integrated circuits, the module does
not have any protection against ESD events or other excursions that exceed the specified
operating parameters.
Generally, ESD protection (typically TVS/Transorb devices) should be added to all signals that
leave the host board. This includes V
Series resistors (typically 47) can also be added in series with data lines to limit the peak
current during a voltage excursion.
NOTE: DO NOT ADD SERIES RESISTANCE TO THE SIM ELECTRICAL LINES.
Minimum ESD Protection Levels
Pin #'s ESD Test Method
Human Body Model
EIA/JEDEC22-A114-A
Pins 4-16, 17,
18, 19, 34, 35
Charge Device Model
EIA/JEDEC22-C101-A
Pins (all Human Body Model
EIA/JEDEC22-A114-A
VBUS/PWR),
37, 38, 42, 43, Charge Device Model
44, 46 EIA/JEDEC22-C101-A
RF Antenna IEC 61000-4-2
Caution – It is the Integrator's responsibility to protect
the Enabler LPP G module from electrical disturbances
and excursions, which exceed the specified operating
parameters.
LPP0108IG001
P = Power Input to Module
R = Power Return from Module
/V .
BAT CC
Table 4: ESD Protection Levels
Version - Preliminary – 06/20/08
26
I/O = Input/Output to/from Module
PWR = Other Power
ESD/Input Voltage
High/
Peak
500
200
2000
500
8000
Units
V
V
V
V
V