Vbat Input; Figure 4 - Example Of Vbat Voltage Droop - Enfora Enabler LPP G Integration Manual

4.5.1.4. Vbat Input

The Enabler Vbat input can have a relative high current draw that can fluctuate rapidly,
especially when transmitting at max power and burst mode. The Vbat interface must be
designed to provide the required instantaneous voltage and current with minimal voltage
droop. This includes both sufficient bulk decoupling capacitance as well as adequate layout
provisions.
Similar to the discussion on thermal relief, the use of narrow traces to connect the Vbat pins
to the source voltage can act like a high impedance and cause a significant voltage droop
when higher currents are required as shown in Figure 4. If the Vbat drops too low, the
Enabler modules will reset. To minimize the trace loss, it is suggested to use a larger trace
that spans several pins. The layout should provide sufficient trace width over the entire trace
from the Enabler module all the way to the source of the Vbat voltage. Any transitions
between layers for this trace should utilize multiple vias.

Figure 4 - Example of Vbat Voltage Droop

Two 470 uF, low ESR, tantalum capacitors are included in the design to provide decoupling
of Vbat input voltage. Bulk decoupling capacitance is not required at the Vbat input external
to the Enabler module.
LPP0108IG001 Version - Preliminary – 06/20/08
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