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Tews Technologies TPMC917-10 User Manual

Mb sram with battery backup and 4 channel rs232
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The Embedded I/O Company
4 MB SRAM with Battery Backup
TEWS TECHNOLOGIES GmbH
Am Bahnhof 7
25469 Halstenbek, Germany
www.tews.com
TPMC917
and 4 Channel RS232
Version 1.0
User Manual
Issue 1.0.7
November 2008
Phone: +49-(0)4101-4058-0
Fax: +49-(0)4101-4058-19
e-mail:
info@tews.com
TEWS TECHNOLOGIES LLC
9190 Double Diamond Parkway,
Suite 127, Reno, NV 89521, USA
www.tews.com
Phone: +1 (775) 850 5830
Fax: +1 (775) 201 0347
e-mail:
usasales@tews.com

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Summary of Contents for Tews Technologies TPMC917-10

  • Page 1 4 MB SRAM with Battery Backup and 4 Channel RS232 Version 1.0 User Manual Issue 1.0.7 November 2008 TEWS TECHNOLOGIES GmbH TEWS TECHNOLOGIES LLC Am Bahnhof 7 Phone: +49-(0)4101-4058-0 9190 Double Diamond Parkway, Phone: +1 (775) 850 5830 25469 Halstenbek, Germany...
  • Page 2 2 MB SRAM module with battery backup TEWS TECHNOLOGIES GmbH is not liable for any damage arising out of the application or use of the device described herein.
  • Page 3 Issue Description Date First Issue September 2000 General Revision May 2003 Added Security Warning (Lithium Battery) August 2004 TPMC917-20 added March 2005 PCI Class Code changed, PCI Header and EEPROM June 2005 Correction New address TEWS LLC September 2006 TPMC917-21 added July 2008 Correction in “Interrupt Status Register”...

  • Page 4: Table Of Contents

    LOCAL SPACE ADDRESSING.................. 9 3.1 PCI9030 Local Space Configuration .....................9 3.2 Local I/O Space ..........................9 3.3 Local Memory Space ........................10 3.3.1 Register Set of each UART channel (TPMC917-10 only) ..........11 3.3.2 Special Registers .......................12 3.3.2.1 FIFO Ready Register Channel 0-3 (TPMC917-10 only) ........12 3.3.2.2...
  • Page 5 FIGURE 6-4 : DIP SWITCH SETTINGS FOR BATTERY BACKUP DISABLED ..........24 FIGURE 7-1 : MEZZANINE P14 I/O CONNECTOR ..................25 FIGURE 7-2 : P14 PIN ASSIGNMENT ......................25 FIGURE 7-3 : FRONT PANEL DB25 FEMALE CONNECTOR (TPMC917-10 ONLY)........26 FIGURE 7-4 : DB25 PIN ASSIGNMENT......................26 TPMC917 User Manual Issue 1.0.7...

  • Page 6: Product Description

    P14 I/O connector. The TPMC917-10 provides four RS232 channels. Each channel has a programmable baud rate up to 115.2 Kbaud. The 4 channel UART16C654 provides 64 byte transmit FIFO and 64 byte receive FIFO for each channel to significantly reduce the overhead required to provide data to and get data from the transmitter and receiver.

  • Page 7: Technical Specification

    4.37V typical 5V Power Failure Threshold Max./Min. External Battery 5.5V maximum / 3.0V minimum Voltage via P14 I/O I/O Interface I/O Connector DB25 female connector (TPMC917-10 only) 64 pin Mezzanine P14 I/O TPMC917 User Manual Issue 1.0.7 Page 7 of 26...

  • Page 8: Figure 2-1 : Technical Specification

    Physical Data Power Requirements +3.3V 177mA typical 456mA typical (TPMC917-10) 450mA typical (TPMC917-20/21) +12V 360µA max (no load on serial ports, TPMC917-10 only) -12V 360µA typical (no load on serial ports, TPMC917-10 only) Battery 1.6µA typical @+25°C backup Temperature Range Operating 0 °C to +70 °C...

  • Page 9: Local Space Addressing

    3 Local Space Addressing 3.1 PCI9030 Local Space Configuration The local on board addressable regions are accessed from the PCI side by using the PCI9030 local spaces: PCI9030 PCI9030 Size Port Endian Description Space Width Mode Local PCI Base Address (Byte) Mapping Space...

  • Page 10: Local Memory Space

    Comment 0x00 to 0x07 UART controller channel 0 0x08 to 0x0F UART controller channel 1 0x10 to 0x17 UART controller channel 2 TPMC917-10 only 0x18 to 0x1F UART controller channel 3 0x20 FIFO Ready Register CH0-CH3 0x21 Interrupt Status Register Figure 3-3 : Local Register Memory Map TPMC917 User Manual Issue 1.0.7...

  • Page 11: Register Set Of Each Uart Channel (Tpmc917-10 Only)

    3.3.1 Register Set of each UART channel (TPMC917-10 only) Each of the four serial channels of the TPMC917-10 is accessed in the PCI memory space by two sets of registers. Both register sets have a common register, the Line Control Register (LCR). Bit 7 of the LCR is used to switch between the two register sets of a channel.

  • Page 12: Special Registers

    Interrupt Status Register Figure 3-6 : Special Register 3.3.2.1 FIFO Ready Register Channel 0-3 (TPMC917-10 only) The FIFO Ready Register FIFORDY1 is a byte wide read only register. The FIFO Ready Register provides the status of the transmit and receive FIFOs of channel 0 to channel 3. Each TX and RX channel (0-3) has its own 64 byte FIFO.

  • Page 13: Interrupt Status Register

    3.3.2.2 Interrupt Status Register The Interrupt Status Register is a byte wide read / write register located in the PCI Memory Space (PCI Base Address 3 + 0x21) and is useful for fast interrupt source detection. It reflects the interrupt status of the four UART channels and the two Battery Status Interrupts. The battery interrupts can be enabled and disabled.

  • Page 14: Pci9030 Target Chip

    4 PCI9030 Target Chip 4.1 PCI Configuration Registers (PCR) 4.1.1 PCI9030 Header TPMC917-10 PCI CFG Write ‘0’ to all unused (Reserved) bits Initial Values Register writeable (Hex Values) Address 0x00 Device ID Vendor ID 0395 1498 0x04 Status Command 0280 0000...

  • Page 15: Pci Base Address Initialization

    4.1.2 PCI Base Address Initialization PCI Base Address Initialization is scope of the PCI host software. PCI9030 PCI Base Address Initialization: 1. Write 0xFFFF_FFFF to the PCI9030 PCI Base Address Register. 2. Read back the PCI9030 PCI Base Address Register. 3.

  • Page 16: Local Configuration Register (Lcr)

    Not used 0x74 Hidden 2 Power Management data scale 0x0000_0000 Not used Figure 4-3 : PCI9030 Local Configuration Register for TPMC917-10 Interrupt Control/Status: 0x0000_005B = TPMC917-10 0x0000_005A = TPMC917-20/21 Local Address Space 0 Range: 0xFFFFFFC0 = TPMC917-10/20 0xFFFFFFE0 = TPMC917-21 TPMC917 User Manual Issue 1.0.7...

  • Page 17: Configuration Eeprom

    0xFFFF 0xF0 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF Figure 4-4 : Configuration EEPROM TPMC917-10 TPMC917-10: 0x0C = 0x000A, 0x76 = 0x005B 0x28 = 0x0FC0 TPMC917-20: 0x0C = 0x0014, 0x76 = 0x005A 0x28 = 0x0FC0 TPMC917-21: 0x0C = 0x0015,...

  • Page 18: Local Software Reset

    4.4 Local Software Reset The PCI9030 Local Reset Output LRESETo# is used to reset the on board local logic. The PCI9030 local reset is active during PCI reset or if the PCI Adapter Software Reset bit is set in the PCI9030 local configuration register CNTRL (offset 0x50).

  • Page 19: Configuration Hints

    Figure 5-1 : Interrupt Control/Status Register (INTCSR, 0x4C) The local interrupt 1 reflects the four channel UART interrupts (TPMC917-10 only). Bit 2 will be set if bit 1 is set and an interrupt is generated on one or more UART channels. For more information see chapter “Interrupt Status Register”.

  • Page 20: Big / Little Endian

    5.2 Big / Little Endian • PCI – Bus (Little Endian) Byte 0 AD[7..0] Byte 1 AD[15..8] Byte 2 AD[23..16] Byte 3 AD[31..24] • Every Local Address Space (0...3) and the Expansion ROM Space can be programmed to operate in Big or Little Endian Mode. Big Endian Little Endian 32 Bit...
  • Page 21 To change the Endian Mode use the Local Configuration Registers for the corresponding Space. Bit 24 of the according register sets the mode. A value of 1 indicates Big Endian and a value of 0 indicates Little Endian. Use the PCI Base Address 0 + Offset or PCI Base Address 1 + Offset: Short cut Offset Name...

  • Page 22: Installation

    6 Installation 6.1 Security Warning (Lithium Battery) CAUTION! - This system contains a lithium battery. Lithium batteries may explode if mishandled. Please observe the following warnings strictly. If misused, the battery may explode or leak, causing injury or damage to the equipment. •...

  • Page 23: Battery Backup Selection

    6.2 Battery Backup Selection The TPMC917 provides two possibilities for battery backup operation: either the on board Lithium Cell or an external battery connected via the P14 I/O connector. An original packed Lithium Cell is delivered together with the TPMC917. Insert the Lithium Cell with the plus pole “+” visible. A four position miniature DIP switch is used to select the source for battery backup.

  • Page 24: Figure 6-3 : Dip Switch Settings For Battery Backup Via P14 I/O Connector

    Figure 6-3 : DIP switch settings for battery backup via P14 I/O Connector Figure 6-4 : DIP switch settings for battery backup disabled Any other DIP switch settings are not allowed. If the voltage of the backup battery is lower than the specified battery fault voltage, an interrupt will be issued to the PCI bus during normal operation (TPMC917 powered by standard 5V supply).

  • Page 25: Pin Assignment - I/O Connector

    7 Pin Assignment – I/O Connector 7.1 Mezzanine P14 I/O Connector Signal Function Bat_Ext External battery supply Not connected Bat_Ext External battery supply Not connected Bat_Ext External battery supply Not connected Board Ground Not connected Board Ground Not connected Board Ground 12…64 Not connected Figure 7-1 : Mezzanine P14 I/O Connector...

  • Page 26: Front Panel Db25 Female Connector (Tpmc917-10 Only)

    Clear to Send UART C Not connected Receive Data UART D CTSD# Clear to Send UART D Not connected Figure 7-3 : Front panel DB25 female Connector (TPMC917-10 only) Figure 7-4 : DB25 Pin Assignment TPMC917 User Manual Issue 1.0.7 Page 26 of 26...

This manual is also suitable for:

Tpmc917-21Tpmc917-20

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