Hypermcp - Renesas RZ/A Series User Manual

RZ/A2M CPU Board RTK7921053C00000BE
2.3.3

HyperMCP

RTK7921053C00000BE is equipped with HyperMCP x 1 shown in Table 2.3.3 as a default installation. HyperMCP is
controlled by the HyperBus controller. During boot (boot mode 7), data (programs) can be read from the HyperFlash in
HyperMCP.
Moreover, jumper JP2 is set to supply power to PVcc_HO and HyperMCP. Please be sure to set voltage to 1.8V.
Figure 2.3.2 shows HyperMCP block diagram. Moreover, Table 2.3.4 displays jumper JP2 function setting table.
Table 2.3.3 HyperMCP Overview
Memory Type name
types
HyperMCP S71KS512SC0BHV000
RZ/A2M (U1)
HM_CK/OM_SCLK
HM_CS0#/OM_CS0#
HM_CS1#/OM_CS1#
HM_DQ[7:0]/OM_SIO[7:0]
HM_RWDS/OM_DQS
HM_RESET#/OM_RESET#
PH4 /
RAMVcc
PVcc_HO PH3 / HM_RSTO#
Note: Red characters
function s in use.
：Unmounted .
Figure 2.3.2 HyperMCP Block Diagram
Table 2.3.4 Function Settings for Jumper JP2
Jumper
JP2 Supplies 3.3V to PVcc_HO and HyperMCP.
(Setting prohibited)
[Note] shows the setting function to select.
If jumper JP2 is errorneously set, memory may be damaged. Pay full attention to the settings.
R20UT4397EJ0100 Rev.1.00
2018.10.11
RZ/A2M Connect with
interface
HyperBus controller
CLK
CLK #
HM_CK#
CS0#
CS1#
D[7:0]
DS
3.3V
RESET#
3.3V
INT#
HM_INT#
RSTO#
indicate
3.3V
1-2
Operational
voltage
1.8V
16
CLK
RAMVcc
CLK#
RAMVcc
CS0#
CS1#
RAMVcc
D[7:0]
DS
RESET#
INT#
RSTO#
RAMVcc 1.8V
1 3
JP2
Supplies 1.8V to PVcc_HO and HyperMCP.
(Initial setting)
2. Function specifications
capacity
HyperFlash: 64MB 24 ball BGA
HyperRAM: 8MB
HyperMCP (U3)
CK
CK#
CS1#
CS2#
DQ[7:0]
RWDS
RESET#
INT#
RTSO# VccQ
2-3
package
RAMVcc
Vcc
RAMVcc
2-18